Keysight Technologies accelerates high-performance packaging innovation for AI and data centers.

Keysight announced on the 13th that it is collaborating with Intel Foundry to support EMIB-T (Embedded Multi-die Interconnect Bridge-T), a next-generation high-performance semiconductor packaging technology.

This collaboration aims to develop high-speed, high-efficiency packaging solutions for the artificial intelligence (AI) and data center markets, and will also support Intel's advanced 18A process node.

As AI and data center workloads grow in complexity, reliable communication between chiplets and 3DICs, high-speed data transfer, and efficient power supply are becoming essential.

Accordingly, the semiconductor industry is adopting open interconnect standards such as Universal Chiplet Interconnect Express™ (UCIe™) and Bunch of Wires (BoW) to enable consistent integration across diverse design platforms.

Keysight EDA and Intel Foundry are expanding the chiplet interoperability ecosystem by validating the compliance and link margin of chiplet designs based on these standards.

This collaboration will reduce design risks andIt focuses on reducing development costs and accelerating innovation in semiconductor design.

Keysight EDA's Chiplet PHY Designer is the latest solution for high-speed digital chiplet design optimized for AI and data center applications, now offering advanced simulation capabilities and BoW support for the UCIe 2.0 standard.

This tool features advanced capabilities for system-level chiplet design and die-to-die (D2D) design, enabling precise verification before silicon fabrication and reducing development time to tapeout.

“Our collaboration with Keysight EDA on EMIB-T technology is a significant step forward in advancing high-performance packaging solutions,” said Suk Lee, vice president of Foundry Ecosystem Technology at Intel. “By incorporating standards like UCIe™ 2.0, we are increasing chiplet design flexibility and helping customers precisely meet their next-generation requirements.”

“Keysight EDA’s Chiplet PHY Designer is redefining pre-silicon verification, enabling designers to verify quickly and accurately,” said Niels Fache, vice president of Keysight’s Design Engineering Software business. “By proactively embracing evolving standards like UCIe 2.0 and BoW, and supporting Intel Foundry’s EMIB-T technology, we are helping to reduce design iterations and accelerate innovation.”