Infineon Technologies, the world's leading automotive semiconductor company, is putting RISC-V at the forefront as a core pillar of its next-generation automotive computing platform to fully respond to the surge in workloads within vehicles.

Infineon announced the introduction of its automotive RISC-V microcontroller family at a press conference on the 20th.

The presentation on this day was given by Thomas Böhm, Senior Vice President of Infineon’s Automotive Microcontroller business unit, under the theme of “Next-Generation Automotive Microcontroller Strategy with RISC-V.”

Thomas Böhm, Senior Vice President, stated, “As the automotive industry rapidly shifts from a focus on ‘mechanical performance’ to ‘software functions,’ the functional safety, secure communications, and high-performance microcontroller (MCU) technologies that Infineon has accumulated in the automotive semiconductor field are becoming the ‘foundation’ for the SDV transition,” adding that “by 2025, automotive microcontrollers "We recorded a 36% market share and expanded it by 4 percentage points compared to the previous year," they stated.

He went on to say that a key change in SDVs is that the vehicle's electronic structure is being reorganized from a 'distributed ECU (Electronic Control Unit) bundle' to a centralized structure centered on a 'high-performance computing engine,' and emphasized that a 'radical redesign' is required to implement the SDV architecture, including a zone-based architecture, a high-bandwidth, low-latency network (Internet-based communication), and a new power distribution structure that efficiently distributes battery power to high-performance computing.

In particular, it was stated that automobiles require a flexible and scalable foundation as workloads grow from traditional control to 'data, network, and AI,' with computational characteristics such as data processing (like radar and environmental perception), high-bandwidth internet stacks, and AI functions.

Accordingly, they emphasized that they are making a strategic investment in RISC-V as a computational architecture that will determine the next 10 to 20 years.

The background for the RISC-V focus presented by Senior Vice President Thomas Böhm consists of three main branches.

The first is scalability; unlike existing systems that handle only control-centric workloads, SDVs rapidly expand their computational load to include data processing such as radar and environmental perception, networking based on high-bandwidth internet stacks, and AI functions that are expected to increase rapidly in the future.

The explanation is that in a situation where it is difficult to predict what AI features will be included even five years from now, there is a need for an ISA that can be flexibly scaled to suit various workloads.

The second is architectural control.

Senior Vice President Thomas Böhm presented the requirement of not relying on a single vendor, citing 'lock-in' to a specific ecosystem.They stated that they would avoid [specific approach] and autonomously handle the design in accordance with the long-term roadmap and changes in requirements.

Third is openness, and it was mentioned that an open ISA allows various entities to participate and accelerate extension and innovation, and that as standardization is achieved, the software and tool industries gain justification for investment.

Senior Vice President Thomas Böhm argued that RISC-V fosters innovation and collaboration, and increases long-term transparency without vendor lock-in.

RISC-V is not a trend limited to automobiles.

RISC-V International reported that NVIDIA announced at the RISC-V event in China in July 2025 that it would make the CUDA platform compatible with RISC-V CPUs (hosts).

This is considered a signal that the scope of RISC-V utilization in AI and high-performance workloads can expand.

Qualcomm also officially announced the acquisition of Ventana Microsystems, a company specializing in RISC-V CPUs, in December 2025, clearly demonstrating its commitment to strengthening the RISC-V standard and ecosystem.

In terms of standardization, Bosch, Infineon, Nordic, NXP, and Qualcomm announced plans to establish a joint venture in Germany in 2023 to promote RISC-V-based product compatibility and reference architectures, and subsequently, STMicroelectronics joined as the sixth shareholder in August 2024.