As the competition in AI accelerator performance intensifies, concerns in the server development field are increasingly extending beyond computational performance itself. This is because while the processing capabilities of GPUs and dedicated accelerators (NPUs) are rapidly improving, the power design supporting them remains a much more complex and challenging issue. Particularly in large-scale AI servers, power is not merely a "resource requiring a lot of resources," but acts as a critical variable that determines system stability and service quality.
Amidst these changes, Jeongpil Hwang, an FAE at Macnica, a global semiconductor solution distributor, views power design for AI accelerators as a “different issue from existing server power.” Based on domestic and international customer cases encountered in the field, we listened to his insights on how power design is escalating into a system-level issue and the role Analog Devices (ADI)’s AI Power Solution plays in this process.
Power is no longer a 'fixed supply' To understand the power design of AI accelerators, we must first redefine the concept of a 'stable power supply.' According to FAE Hwang Jeong-pil, power design in existing servers or general electronic devices was relatively simple. It was sufficient to stably supply a constant voltage and current, and load fluctuations were relatively gradual.
However, the AI accelerator environment is different. The latest GPUs and AI accelerators operate at low voltages of 0.75 to 0.8 V, but require over 1,000 A of current at moments when computation is concentrated. The problem is not only the magnitude of the current, but also its rate of change. Computational loads fluctuate rapidly in units of tens of nanoseconds, and the power supply must respond immediately to these changes.
FAE Hwang believes that power design is directly linked to performance at this point. In AI systems configured in parallel, if the power response of a single accelerator module becomes delayed or unstable, the impact spreads to adjacent modules. Consequently, as the power consumption and thermal load of the entire system increase simultaneously, stability issues can escalate. In AI servers, power is no longer merely a "supporting element" but has effectively become an active control target that coordinates the operation of the entire system.
You're saying you aren't considering multi-phase when developing a server for AI? In AI server development environments, it is difficult to meet requirements with a single PMIC or a single power stage structure. FAE Hwang Jeong-pil attributes this to why a multi-phase structure has become a fundamental premise in AI accelerator power design: it is necessary to handle high currents while ensuring fast responsiveness.
Multiphase power architecture reduces the current that each phase must handle and increases the response speed to load changes by supplying power in multiple phases. Additionally, it can be expanded to 8, 16, or more phases as needed, allowing the power configuration to change flexibly as accelerator core performance increases.
From this perspective, FAE Huang evaluates ADI's multi-phase controller approach as a realistic solution. ADI's AI Power Solution is designed to enable the configuration of more phases by linking multiple controllers, based on a basic 16-phase configuration. This is significant not only in that it simply increases current capacity, but also in that it provides structural margins that allow for future expansion from the board design stage.
Why You Should Pay Attention to Power Design, PCIe and OAM, and Platform Changes Another important variable in AI accelerator power design is the platform. Currently, AI accelerators are broadly categorized into PCIe-based card-type structures and Open Accelerator Module (OAM) forms. FAE Hwang Jeong-pil explains that the difference between the two platforms is not merely a matter of form factor, but changes the power design philosophy itself.
PCIe-based accelerators structurally have a power limit of approximately 600W. Since the power supplied from the slot and the auxiliary power structure are fixed, both core performance and power design are constrained to a certain extent. On the other hand, OAM is a platform designed from the outset with a target of over 1000W. Along with higher power density, it requires much more demanding thermal and power management.
In OAM structures, the board is often fixed to the bottom and the heatsink is attached to the top. Consequently, the height and placement freedom of power components significantly influence the difficulty of the design. In this regard, FAE Huang believes that power solutions have become factors that must consider not only electrical performance but also mechanical and spatial conditions.
ADI AI Power Solution's core technology Under such complex conditions, one of the features of the ADI AI Power Solution that Macnica is focusing on in the field is a power structure utilizing coupled inductors. Coupled inductors are effective in reducing current ripple, which allows for a reduction in the number of output capacitors. This goes beyond simple component reduction and leads to increased board area and layout freedom.
Particularly in environments with significant space constraints, such as AI server boards, the height of power components heavily influences design possibilities. FAE Huang explains that coupled inductors provide a relatively low profile, creating room to consider placement not only on the top but also on the bottom surface in structures like OAM.
Of course, he noted that this structure is not a perfect solution for all situations, explaining that because coupled inductors combine multiple phases into a single package, layout flexibility can be limited; consequently, designers must make decisions by considering power requirements, space constraints, and layout complexity together. The important point is "not the specific component itself, but whether it provides an option that minimizes design risk under given conditions."
The Reality of Domestic AI Server Development and the Importance of 'Design Frameworks' FAE Hwang Jeong-pil offers a relatively realistic assessment of the domestic AI server development environment. He notes that there are still few companies with extensive experience in AI server power design, and that a significant number of projects are proceeding based on references secured through outsourcing. In this process, power design remains the biggest factor of uncertainty.
Under these circumstances, he believes the true strength of ADI AI Power Solution lies not in simple chip performance, but in systematic support that encompasses the entire design process. ADI provides computational tools capable of predicting current ripple and other parameters upon inputting power specifications, simulation environments, evaluation boards like EVKit, and even PCB artwork guides. This enables designers to approach the process with a consistent flow from the initial review stage to verification and implementation.
FAE Hwang emphasizes that this approach is particularly important for less experienced teams, as power design is an area where a single mistake can lead to a complete board redesign. Securing verifiable processes alone can significantly reduce development risk, which directly translates into stability in development schedules and costs.
Power design determines the completeness of the AI server AI accelerators and servers are no longer at a stage where they compete solely on computational performance. Power efficiency, response speed, scalability, and, above all, stable operational capability are now evaluated together. Amidst these changes, FAE Hwang Jeong-pil viewed ADI’s AI Power Solution as “a highly complete power architecture that AI accelerator designers can realistically choose.”
Power design is no longer a matter of component combination. For AI server developers and designers, power is the foundation that enables the system to push to its limits, and how that foundation is designed determines the product's competitiveness.