Implementing 16GB by stacking 8 1y 16Gb DRAMs
Processes 410GB of data at 3.2Gb/s On the 4th, Samsung Electronics launched 'Flashbolt', a high-speed DRAM that can be used for HPC and AI-based ultra-high-speed data analysis.

▲ Samsung Electronics 16GB HBM2E DRAM Flashbolt
(Photo = Samsung Electronics)
Flashbolt is a third-generation 16-gigabyte (GB) HBM2E (High Bandwidth Memory 2 Extended) DRAM, and is 1.3 times faster and 2.0 times more capable than the second-generation 8GB HBM2 DRAM 'Aquabolt' released two years ago.
Flashbolt achieves a capacity of 16GB by stacking eight 16-gigabit (Gb) 10nm-class (1y) DRAM chips on a single buffer chip.
Samsung Electronics applied 'ultra-high density TSV design technology' that drilled more than 5,600 tiny holes in a 16Gb DRAM chip and vertically connected eight chips with a total of more than 40,000 TSV (Through Silicon Via) bonding balls.
By utilizing a signal transmission optimization circuit design, it can process 410 GB of data at a speed of 3.2 Gb per second through a total of 1024 data transmission channels.
Samsung Electronics plans to mass produce this product this year. />
Meanwhile, SK Hynix announced in August that it had successfully developed HBM2E DRAM.