MAX32666 MCU, part of Maxim Darwin family
Integrated with 2 processors, BLE MCU, PMIC, etc.
Extend the life of coin cell battery operated devices A low-power MCU has been released that will reduce the battery replacement cycle of IoT applications.
Maxim Integrated Korea released the MAX32666 MCU with dual Arm Cortex-M4 processors on the 22nd.
▲ Maxim MAX32666 MCU Released [Image = Maxim]
Designers of coin-cell battery-powered IoT products with wireless communication capabilities can reduce bill of materials costs by one-third, while also reducing footprint and battery consumption with the MAX32666.
The MAX32666 integrates a dedicated application processor with floating-point unit (FPU), a separate processor that acts as a sensor hub, a standalone Bluetooth Low Energy (BLE) 5.2 MCU, and a power management IC (PMIC). It is housed in a 3.8mm × 4.2mm WLP package, which also reduces board space.
The MAX32666, part of Maxim's high-performance DARWIN MCU family, uses a large onboard memory with up to 1MB of flash memory and 560KB of SRAM. Integrates error-correcting code (ECC) into flash, SRAM, and cache memory to prevent unexpected bit flips, add reliability, and provide ECC to many high-speed peripherals.
▲ MAX32666 reduces installation space and battery consumption [Photo = Maxim]
The MAX32666 features an integrated single-inductor, multiple-output (SIMO) regulator that replaces the need for a separate PMIC to extend the operating time of small, battery-powered devices. Its low power consumption in active mode also extends the operating life of coin-cell battery-powered devices, and it provides dynamic voltage scaling to minimize active core power consumption.
The cache memory power is 27.3uA/MHz (3.3V), and it has several power-down modes to extend battery life by consuming 1.2uA at the lowest power mode of 3.3V. It also provides BLE 5.2 and 2Mbps data throughput and long-distance communication (125kbps, 500kbps), and +4.5dBm transceiver output power.
The MAX32666 provides fast compute acceleration for the Trust Protection Unit (TPU) and high-speed Elliptic Curve Digital Signature Algorithm (ECDSA) to protect applications from cybersecurity threats. The hardware accelerator provides AES-128, 192, and 256 encryption, while a true random number generator (TRNG) and SHA-2 accelerator enhance security, and a secure bootloader protects IP firmware.
