■ In case of current imbalancetm_medium=referral&utm_campaign=202211_ap_kr_pss_pss.ppsi_mos" target="_blank">Power dissipation imbalance between MOSFETs

Motor drive applications use a half-bridge topology (typically three-phase) to generate an AC power signal that is used to drive an electric motor to generate either positive or negative torque. High output currents can be achieved by using parallel MOSFETs as switches.

When using MOSFETs in parallel, current distribution between the parallel devices must be considered. Current imbalances caused by layout asymmetry or differences in MOSFET parameters can result in imbalanced power consumption between MOSFETs.

This paper examines how differences in MOSFET parameters affect current imbalance between parallel MOSFETs, and thus the average power dissipation imbalance. To understand power dissipation and system performance, various system characteristics must be considered, from layout and switching to load current and PWM mode. This analysis may differ slightly depending on the application or system, but can basically be applied equally.

This article also discusses the importance of matching VGS(th) between parallel MOSFETs and the effect of transconductance (gfs) on current sharing. Lower gfs can improve current balancing between parallel MOSFETs, but conduction characteristics must also be considered as they entail higher RDS(on) values.

■ Calculation of MOSFET power consumption when AC output load current is

To understand the effect of MOSFET parameters on the resulting total power dissipation, simulations were performed using a half-bridge with two MOSFETs connected in parallel on both the high and low sides. The circuit model in Figure 1 is simplified to be perfectly symmetrical. However, the parasitic inductance and resistance of the traces in each circuit must be considered. MOSFETs Q1 and Q3 are connected in parallel to form a high-side switch.

To analyze system power consumption, one must distinguish between instantaneous power consumption and average power consumption. Instantaneous power consumption is an extremely dynamic factor. MOSFET power dissipation is composed of the following factors:

· EON - MOSFET switching loss at turn-on
· EOFF - MOSFET switching loss at turn-off
· PCND - conduction loss of the open MOSFET channel in forward conduction
· PD - conduction loss of the body diode
· EDoff - reverse recovery loss of the body diode
· EON - MOSFET switching loss at turn-on
· EOFF - MOSFET switching loss at turn-off
· PCND - Conduction loss in open MOSFET channel during forward conduction
· PD - Conduction loss of the body diode
· EDoff - reverse recovery loss of the body diode

The impact of each of these factors on the overall power dissipation is highly dependent on the load current characteristics and the control scheme used. Therefore, it is important to consider how specific MOSFET parameters affect the overall system performance in a way that is appropriate for a given application.

Average power consumption and thermal characteristics are direct limiting factors in system performance, as they determine device temperature. The average power consumption can be said to be the sum of switching loss and conduction loss.

· PQ1-SW(avg) - average switching losses at MOSFET Q1
· PQ1-CND(avg) - average conduction losses at MOSFET Q1
· PQ1-TOT(avg) - total average losses at MOSFET Q1 (sum of PQ1-CND(avg) and PQ1-SW(avg))
· PQ1-SW(avg) - Average switching loss of MOSFET Q1
· PQ1-CND(avg) - Average conduction loss of MOSFET Q1
· PQ1-TOT(avg) - Total average power dissipation of MOSFET Q1 (sum of PQ1-CND(avg) and PQ1-SW(avg))

For relatively simple conditions using DC output current, it is possible to calculate the average power consumption in steady-state operation using only a single PWM cycle. However, to calculate the power consumption with sinusoidal output current, at least one complete sine-wave cycle must be considered, since the current amplitude is different for each PWM cycle.

This article discusses MOSFET power dissipation when using AC load current as a half-bridge output, as this is the case for most motor drive applications. Therefore, the output load current is a sine wave of a certain amplitude according to the following formula: The switching modulation method is sinusoidally-weighted pulse width modulation (SPWM), and uses the conditions and settings shown in Table 1. All cases mentioned in this article use the same SPWM conditions.

■ Impact of power consumption imbalance and VGS(th) difference

Regarding the imbalance between parallel MOSFETs, the power dissipation of each MOSFET must be considered to achieve a reliable system design. Therefore, this paper shows the average power dissipation of each MOSFET according to the output load current under different conditions.

The most important thing to interpret when interpreting these results is which MOSFET dissipates more power. This MOSFET (the 'hottest' MOSFET) is the bottleneck for system output current.

Different MOSFET parameters affect current sharing in different ways. RDS(on) affects the MOSFET conduction, while other parameters (VGS(th), RG, CGS, CGD) affect current sharing during switching. By performing simulations with a perfectly symmetrical layout, the influence of individual MOSFET parameters can be investigated.

Compared to other parameters, the VGS(th) difference has a more significant effect on the overall performance because of the difference in VGS(th) caused by the normal MOSFET manufacturing process. The VGS(th) difference leads to an imbalance in power dissipation. The MOSFET with lower VGS(th) has higher switching losses both at turn-on and turn-off between parallel MOSFETs. This is different from other parameters. In addition, VGS(th) has a negative temperature dependence, which aggravates the imbalance. However, the discussion on temperature dependence is excluded in this paper.

As an illustration of the importance of VGS(th) matching between parallel MOSFETs, the graphs in Figure 2 compare MOSFET power dissipation under two different VGS(th) differences.

Table 2 shows the VGS(th) values used in the simulation.

In Figure 2, the orange line shows the worst-case result when VGS(th) differs from the maximum and minimum values specified in the data sheet. It can be seen that for a given output voltage, the power dissipation of Q1 is almost twice that of Q3.

Statistically, such extreme differences are unlikely, so we need to look at more realistic conditions, considering the parameter distribution of the sample lot. The green line in Figure 2 shows the result when the VGS(th) difference is slightly lower, ∆VGS(th) = 0.5 V.

Power dissipation is proportional to the average temperature of the MOSFET and therefore determines the limit of the system output current. Because the maximum device temperature must not be exceeded for any MOSFET.

To reduce system size, it is important to reduce current imbalance when using MOSFETs in parallel. If current imbalance is high, power consumption will be concentrated in one device, thereby eliminating the benefit of paralleling.

Therefore, when selecting MOSFETs for parallel use, it is important to select MOSFETs with a small difference in VGS(th) during production.

■ The effect of transconductance (gfs) on current sharing

Current imbalance during switching is greatly affected by ∆VGS(th). However, this is not the only factor that affects the imbalance. By examining the effect of VGS(th) for different values of transconductance (gfs), we can better understand its effect on current sharing. The value of gfs is not constant across the ID range. Figure 3 shows this characteristic. In data sheets, gfs (e.g., gfs = 185) is usually specified as a value for a specific ID. Therefore, for accurate simulation, this characteristic must be considered across the entire range.

Lowering the gfs affects both switching losses and conduction losses. Since RDS(on) is dependent on gfs, selecting a MOSFET with a lower gfs increases conduction losses. Low gfs also slows down switching, thus increasing switching losses.

For a fair comparison, Table 3 matches the switching speed (diD/dt during switching) through the RG network with different gfs values.

Figure 4 shows a comparison of two gfs values with a VGS(th) difference ∆VGS(th) = 0.5 V between Q1 and Q3. The Rg value was lowered with low gfs to match diD/dt during switching.

Switching loss imbalance can be improved by lowering the gfs and matching the switching. However, the overall performance can be said to be worse because the increased RDS(on) increases the conduction loss, which increases the total power consumption.

In other words, the increase in conduction loss outweighs the benefit of improving current sharing.

Balancing switching losses is also important if, for any reason, switching losses increase and become a major contributor to total power consumption. There will be some threshold where improving current sharing becomes more beneficial despite increased conduction losses.

Therefore, the important thing is to optimize by considering the characteristics of each system.

■ Analysis of the influence of individual parameters is required

To understand how current imbalance affects power consumption distribution, the influence of individual parameters must be analyzed.

Regardless of the cause of the imbalance, the hotter one of the parallel MOSFETs becomes the "weak link" in the system and will determine the limits of system performance. The higher the current imbalance, the higher the accumulated losses in one MOSFET.

Therefore, by improving current sharing as a way to reduce the power dissipation of the hotter MOSFET, system performance can be improved. However, it is also important to consider the overall power dissipation. If balancing losses increases the overall power dissipation, this is not an improvement.

Moreover, this optimization will vary from application to application and will depend on the exact system specifications and control method. Therefore, we need to comprehensively consider which device is suitable for a given system.

Infineon 's latest generation of power MOSFETs is designed to improve current sharing while maintaining low RDS(on) values, targeting applications using parallel MOSFETs. To support the latest trends in power converter technology, Infineon offers a differentiated product portfolio that helps designers design highly efficient and economical solutions.

The application note, 'Parallel Use of Power MOSFETs in High Current Applications', provides more case studies and test results. You can also find more information in the online training 'Parallel MOSFET Balancing: Importance of Parameter Distribution'.

Additionally, design support documentation, reference designs and simulation models are available on Infineon 's N-Channel LV/MV Power MOSFETs webpage.

※ author
Medic Urban, Senior Application Engineer in Motor Drives,
Elvir Kahrimanovic, Principal Application Engineer in Motor Drives,
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