상단 피드백 저항에 접근할 수 없는 경우의 루프 응답 측정 방법에 대해 아나로그디바이스(ADI)의 아담 허프와 조지 치안이 이야기한다.
“Loop analysis possible without upper feedback resistance”
LTM4702, current reference circuit used, no top feedback resistor
When using the VOSNS pin, loop response measurement is similar to the existing measurement method.
This article details how to measure the loop response when there is no clear injection point in the power supply, i.e., it is not accessible or there is no top feedback resistor. This situation can occur in two cases: one is when there is an inaccessible top feedback resistor inside the power supply module, and the other is when there is only an output sense pin and no top feedback resistor.
■ Power supply unit stable operation requires specific gain and phase margins A power supply requires a certain gain and phase margin to operate stably. Typically, a power supply is required to have a phase margin of at least 45° and a gain margin of at least 10 dB to be considered stable.
These values can typically be obtained by inserting a small resistor between the VOUT node and the upper feedback resistor, applying a perturbation signal to this added resistor, and then measuring the loop response over the desired frequency range.
This traditional method is preferred because it is easy to measure if the user has access to the upper feedback resistor.
But how can we measure the loop response if the top feedback resistor is inside the molded module and therefore inaccessible?
Also, how do you measure the loop response if your device does not require a top feedback resistor and instead uses an output voltage sense pin?
In this paper, we will answer these questions by comparing Bode plots of conventional and new approaches to measuring loop response.
■ Location of the upper feedback resistor As shown in Figure 1, the conventional method for measuring the loop response is to insert a small-value resistor between the VOUT node and the upper feedback resistor. This method can only be used when the upper feedback resistor is accessible.
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▲Figure 1. Schematic showing added resistance to measure loop response using the LT8608

▲Figure 2. Example circuit showing an inaccessible top feedback resistor.

▲Figure 3. Simple block diagram showing the VOSNS circuit.
In many power module products, the top feedback resistor is located inside the power module package and is not accessible. If the top feedback resistor is fixed to the VOUT node, the output voltage should not be higher than the voltage set by the feedback resistor divider. If the top feedback resistor is not fixed, the VOUT node can be as high as the input voltage (VIN) of the buck regulator if the resistor is not properly connected or is open.
Many μModule® families from Analog Devices have the top feedback resistor molded inside the module for this additional protection. However, this makes it impossible to measure the loop response using conventional methods. Figure 2 shows the LTM8074 with this inaccessible top feedback resistor.
Another special case is when the module uses the output voltage sense pin (VOSNS) to regulate the VOUT voltage. As shown in the simplified block diagram in Figure 3, this configuration has no top feedback resistor because it uses a current reference instead of a conventional voltage reference. The LTM4702 uses this current reference circuit to regulate the output voltage.
■ Load Transient Response vs Bode Plot Without a way to measure the loop response of the power supply, one must rely on the transient response of the system to determine stability. The transient response test observes the VOUT response when a load step is applied to the VOUT node. Figure 4 illustrates the transient response.
The bandwidth (ƒBW) in this waveform can be estimated by measuring the time it takes from the time the load step is applied until the output voltage begins to recover. The bandwidth of the control loop is given by the inverse of the 'recovery time (tr) x π(pi).' In this example, the recovery time is about 4 µs, and the bandwidth is 80 kHz.
Additionally, the stability of the system can be estimated by looking at the shape of the waveform.
If ringing appears in the waveform (green response), the system has an underdamped response.
This means that the system may be unstable and have low phase margin. But how low is the phase margin?
If the waveform takes a long time to recover, the response can be considered overdamped (blue response). In this case, the system may take too long to recover the output voltage, which may cause voltage drooping that lasts for a long time and affect downstream circuits.

▲Figure 4. Example of transient response
Although the transient response can provide clues about the loop response of the system, the exact phase margin and gain margin can only be determined by measurement.
■ New loop stability measurement method
When the output voltage sense pin (VOSNS pin) is used, loop response measurement is similar to the conventional measurement method. Connect a small-value resistor between the VOUT node and the VOSNS pin, apply a disturbance signal to this resistor as shown in Figure 3, and then measure the loop response.
If the upper feedback resistor is internal to the module and therefore inaccessible, some care must be taken when utilizing this new loop measurement technique. As shown in Figure 5, a parallel resistor divider network is installed, and the disturbance signal is now applied to the resistor inserted between the lower feedback resistor and ground. Care must be taken to keep the parallel resistor divider network as close as possible to the feedback resistor network to minimize measurement errors.
Step 1: Insert a 20Ω RPERT resistor between R2 and ground. Apply a disturbance signal to the RPERT.
Step 2: Select R4 between 500Ω and 1kΩ. (See 'Reference 1')
Step 3: Calculate the parallel resistor split network ratio: n = R2/R4
Step 4: Calculate R3 and CFF2 using the ratio 'n' obtained in Step 3.
Step 5: Reconfigure the parallel resistor divider network including the feedforward capacitor and capacitor (CM) to nullify the effect of additional capacitance due to the disturbance signal (see 'Reference 2').
official:
1. n = R2/R4
2. R3 = R1/n
3. CFF2 = n × CFF1
4. CM = n × CPERT

▲Figure 5. New loop response measurement method
Note 1: When selecting R4, make sure that R2 is 40 to 100 times larger than R4. This will cause the R2 and R3 resistor network to dominate the feedback loop measurement.
Note 2: If the parasitic capacitance of the disturbance signal cannot be reliably measured, the CM capacitance can be determined empirically through repeatable experiments. 
▲Figure 6. Comparison of Bode plots of existing and new measurement methods
The new measurement method provides the same loop response as the conventional approach, shown in Figure 6.
■ Determine loop response without accessing the upper feedback resistor With this new measurement method, users can now determine the loop response without accessing the upper feedback resistor. Users no longer need to use inferior methods with limited bandwidth and significant errors. They also no longer need to estimate loop stability by only looking at the load transient response.
※ About the author
Adam Huff is a senior design engineer in the Power Module Group at Analog Devices. He has held various positions at ADI since joining in 2005 and holds a bachelor’s degree in electrical engineering technology from Purdue University.
George (Zhijun) Qian is a senior manager for power module design at Analog Devices. He is responsible for all LTM80xx products and some LTM46xx/LTM47xx products. He received his BS and MS degrees from Zhejiang University and his PhD in power electronics from the University of Central Florida. He joined ADI in early 2010.