SK Hynix (CEO Kwak No-jung) officially announced its next-generation DRAM technology roadmap at the IEEE VLSI Symposium 2025 held in Kyoto, Japan, presenting the direction of future semiconductor technology innovation.


SK Hynix CTO Cha Seon-yong gave a keynote speech at the IEEE VLSI Symposium 2025 on the 10th under the theme of “Leading Innovation in DRAM Technology for a Sustainable Future,” and stated that the current fine process is gradually having difficulty improving performance and capacity.

To solve this, he emphasized that he would overcome technological limitations based on the 4F² VG platform and 3D DRAM in the development of technology below 10 nanometers.

The 4F² VG platform is a technology that can realize higher density, higher speed, and lower power memory by minimizing the cell area of DRAM and applying a vertical gate structure.

By adopting a vertical gate instead of the existing planar structure, data storage efficiency will be increased, and electrical characteristics will be improved by incorporating wafer bonding technology.

CTO Cha also presented 3D DRAM as a key next-generation technology. The industry predicts that manufacturing costs will increase with the number of layers, but SK Hynix plans to overcome cost issues and secure competitiveness through technological innovation.

In his presentation, CTO Cha said, “DRAM technology, which was once predicted to have its limit at 20nm, has reached its current level through continuous innovation,” and announced plans to present a long-term innovation vision and cooperate with the industry so that young engineers can participate in the development of future technologies.

Meanwhile, on the 12th, the last day of the event, SK Hynix Vice President Park Joo-dong (in charge of the next-generation DRAM TF) will appear as a presenter and reveal the latest research results that improved the electrical characteristics of DRAM by applying VG and wafer bonding technology.

The technology roadmap unveiled by SK Hynix at this year’s IEEE VLSI 2025 is expected to lead the semiconductor industry’s next-generation memory innovation and serve as an important stepping stone for achieving sustainable DRAM technology advancement for the next 30 years.