| Financial sector struggles to apply AI, ML, and DL technologies
| FPGA is more suitable than GPU in AI inference area
| SDAccel provided for SW engineers unfamiliar with FPGA


The era has arrived where there is no need to take the time to go to the bank or go through the trouble of searching for an ATM.

As 'FinTech', which means the combination of finance and technology, becomes deeply ingrained in our lives, most financial transactions can now be done with smartphones.

The changing financial environment has presented the financial sector with new issues. As small transactions have increased significantly, data traffic has also increased significantly, and therefore, it is necessary to deal with this effectively.

The financial sector is seeking to expand its infrastructure, such as increasing servers and establishing data centers, to ensure smooth movement of data. But as Moore's Law loses steam, processor performance is not improving as dramatically as before.

To cope with the limitations of infrastructure expansion, the financial sector is struggling to find ways to apply AI, machine learning, and deep learning technologies that are developing day by day to financial operations.

On the 17th, Xilinx held a press conference on the topic of ‘Accelerating Financial Technology’ at the JW Marriott Hotel in Seocho-gu, Seoul.

At the seminar, Alastair Richardson, Global Financial Technology Development Manager at Xilinx, explained why the financial industry needs FPGAs.

While GPUs still dominate machine learning, FPGAs are coming into their own when it comes to inference in the data center.

The financial world is looking at FPGAs, which are better suited than GPUs for deploying algorithms and building neural networks. For example, JP Morgan is using AI inference for financial trading, and FPGAs have an advantage over GPUs in inference due to their structure.

For the financial sector and others, Xilinx launched the data center accelerator card, the 'Alveo U50', on August 7. Based on Xilinx’s UltraScale+ FPGA, the U50 is a programmable, low-profile, low-power accelerator designed for scale-out architectures as well as domain-specific acceleration across servers deployed in the cloud and at the edge.

Unlike other fixed architectures, the U50 is programmable in both software and hardware, accelerating speech translation, database queries, Hadoop and big data analytics, low-latency electronic transactions, and more.

When running Monte Carlo simulations, it is seven times more power efficient than running it on a CPU alone, and its small form factor also helps reduce total cost of ownership (TCO).

Xilinx also supports the 'SDAccel' environment for software engineers. SDAccel is an integrated development environment for applications targeting Alveo accelerator cards, AWS F1 instances, and other FPGA-as-a-Service services.

The host application is developed in C/C++ and interacts with FPGA-accelerated features that can be modeled in RTL, C/C++, or OpenCL using standard OpenCL API calls. Therefore, even software engineers who are not familiar with FPGAs can handle FPGAs relatively easily.

At the end of the meeting, Richardson, the head of development, said, “Korea is one of the countries where technological innovation is progressing well,” and “In the financial sector, investment in cryptocurrencies and blockchain technology is active, and options trading is also active.”

He continued, “Xilinx will provide the FPGA capabilities it has accumulated over the years to companies seeking the right technology and platform,” and “We hope that through this, customers will be able to unfold new ideas and opportunities that Xilinx has not thought of.”