2016-09-21
2016-07-13
2016-07-13
2016-07-13
2015-01-14
See the new Virtex Ultrascale VU440, the world’s largest FPGA, in action being used to prototype 10 ARM® Cortex-A9 CPUs
2015-02-02
Learn how to create Linux Applications using Xilinx SDK. We'll also highlight and demonstrate SDK features supporting different aspects of Linux application development and debug. The overall process is quick and simple. For More Zynq Tutorials please visit: http://www.xilinx.com/training/zynq
2015-02-02
Creating a PCI Express Root Complex using IPI and PetaLinux is an easier process than most people realize. This video walks through the process of creating a Linux system using PetaLinux as well as creating the hardware system for Zynq in IPI. Then, using the SoC Mini-ITX board from Avnet, an off the shelf PCIe to USB card reader is connected to the Zynq device through the PCI Express slot and a U..
2015-02-02
Learn how to quickly verify the calibration and read window margin in your memory interface design. Bring up, understand and debug your memory interface design faster than before. For More Vivado Tutorials please visit: http://www.xilinx.com/training/vivado
2015-02-23
Building on the industry’s first All Programmable SoC, Xilinx is enabling a generation ahead of integration and intelligence with unprecedented levels of heterogeneous multi-processing system on chip and delivering 5X system-level performance per watt. By combining the right engines for the right tasks, Zynq® UltraScale+™ MPSoC provides a flexible, scalable processing platform with..
2015-02-23
Xilinx’s 16nm UltraScale+™ family of FPGAs, 3D ICs and MPSoCs, combines new memory, 3D-on-3D and multi-processing SoC (MPSoC) technologies, delivering a generation ahead of value. The Xilinx UltraScale+ FPGA portfolio is comprised of Xilinx’s market leading Kintex® UltraScale+ FPGA and Virtex® UltraScale+ FPGA and 3D IC families, while the Zynq® UltraScale+ family inc..
2015-03-09
The SDSoC development environment provides a greatly simplified ASSP-like C/C++ programming experience including an easy to use Eclipse IDE and a comprehensive design environment for heterogeneous Zynq® All Programmable SoC and MPSoC deployment.
2015-03-09
Analog Devices demonstrates DDS HLS IP with Zynq SDR kit at Embedded World 2015.
2015-03-09
iVeia demonstrates Canny edge detection HLS IPs with iVeia vision kit at Embedded World 2015.
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