TI OCB 5월
XILINX

자일링스의 단일 FPGA로 수백 개의 신호를 디지털화하는 방법

2016-09-21

  • Xylon: Face detection C-callable RTL IP with MicroZed vision kit

    2015-03-09

    Xylon demonstrates face detection C-callable RTL IP with the MicroZed kit at Embedded World 2015.

  • DAVE Embedded Systems: Matrix multiply HLS IP with DAVE Bora kit

    2015-03-09

    DAVE Embedded Systems demonstrates Matrix multiply HLS IP with DAVE Bora kit at Embedded World 2015.

  • SDSoC Development Environment Estimation & Implementation

    2015-03-09

    Part 1 of 2 of an introduction to the SDSoC™ Development Environment. This video reviews the challenges in implementing a system in a Zynq® SoC device and how SDSoC helps resolve those challenges. Then the video shows a demo of SDSoC on an example design to generate performance estimate and run a full design implementation using those estimates, and verifying the results achieved on the ..

  • SDSoC Development Environment Optimization & Debug

    2015-03-09

    Part 2 of 2 of introduction to SDSoC™ Development Environment: This video reviews implementation challenges and how SDSoC helps solve those challenges, take a fully implemented design and modifying it to further optimize the accelerated functions. Then reviews how SDSoC enables interactive debug on an implemented design running on an evaluation board.

  • UltraScale Integrated 100G Ethernet IP for 10x10G and 4x25G

    2015-03-17

    This video demonstrates how using an integrated Ethernet MAC can save power, integration time and logic utilization while delivering the highest possible flexibility. The UltraScale Integrated 100G Ethernet IP supports both CAUI-4 and CAUI-10 interfaces to CFP, CFP2, CFP4 and other pluggable optics. As shown in this video, the IP can easily and dynamically swap between interfaces.

  • Xilinx SDK System Performance Tools Overview

    2015-03-19

    Learn about the System Performance Analysis tools in SDK to model, measure, analyze, and optimize your system. The tools in SDK allow you to instrument and visualize data in your system to achieve maximum performance. For More Zynq Tutorials please visit:http://www.xilinx.com/training/zynq

  • MathWorks demonstrates vision processing on Zynq at Embedded World 2015

    2015-03-31

    MathWorks demonstrates Model-Based Design for rapid prototyping of a HOG algorithm and people detector on Zynq. The design is modeled and verified in MATLAB and Simulink, then targeted to the Zynq-7045 on the Xilinx ZC706 Zynq development kit. The HOG algorithm is implemented on the FPGA fabric via HDL Coder for system acceleration and the detection and tracking of people is executed on the ARM Co..

  • Mentor Embedded demos their multicore framework on Zynq UltraScale+ MPSoC at EW 2015

    2015-03-31

    Mentor Embedded multicore framework allowing synchronization of Linux on the 4 ARM Cortex-A53 cores and Mentor Nucleus RTOS on the two ARM Cortex-R5 cores on the Zynq UltraScale+ MPSoC

  • Enclustra demonstrates 500fps video application on their new Zynq-7045 module at Embedded World 2015

    2015-03-31

    Certified Xilinx Alliance Member Enclustra announces their new Mercury ZX1 module based on the Zynq-7045 and showcases their extensive portfolio of Xilinx Zynq-7000 and FPGA modules. They demonstrate a real-world video system processing 3GB/s of data at 500fps for a railway monitoring application and discuss a multi-channel Bluetooth test application enabled by Zynq.

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