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[Serial] ST Yuji Kawano Engineer ⑥ - Various Operational Tasks ALU, MCU 'Core'

Google 우선 소스 기사입력2021.10.25 17:47

ALU, the 'core' of MCU, performs various calculations
All practical arithmetic and logical operations can be performed
Must have a full adder that performs multiple-bit additions

[Editor's Note] Generally, when we think of semiconductors, we tend to think of semiconductors that are familiar to the general public, such as the CPU and memory of computers. On the other hand, MCUs (Micro Controller Units), which are used as core semiconductors for operating electronic products, are semiconductors that are still unfamiliar to the general public, even though they are commonly used in all electronic products that we easily come across. These MCUs have recently been in the media due to the semiconductor shortage, and have begun to attract the attention of the general public. Accordingly, our magazine has prepared a place to learn about MCUs through a series of articles by Yuji Kawano, Manager of ST Microelectronics, a company specializing in MCU semiconductors.

■ ALU, MCU core


The arithmetic and logic unit (ALU) inside the CPU (the core component of the MCU) performs various computational tasks. It would be most accurate to say that the ALU is the heart of the MCU, as it is the part that performs all the actual arithmetic and logic operations. Now let's take a look at what's going on inside the ALU.

■ Use truth tables instead of Venn diagrams

The best way to find out what's inside an ALU is to build one yourself. To do that, we'll first build an adder and then design a simple logic circuit. In this article, we'll look at how to build an ALU that can perform the logical operations OR, AND, and NOT (inversion), as well as the arithmetic operations of addition and subtraction.



▲Figure 1: Logical operations represented by a Venn diagram



Before we get into the ALU, let’s take a quick look at the logical operations like AND, OR, and XOR. Let’s go back to our school days and think about the Venn diagrams we learned back then. Venn diagrams are generally used to study sets, but they can also be used for logical operations. The reason why they are useful for understanding logical operations is because they provide a visual aid. The two circular areas of the Venn diagram represent the input values of the logical operation, and the shaded areas represent the output values. For example, the output of AND is the area where the two circles overlap, the output of OR is the area inside the two circles and the area where the two circles overlap, and the output of exclusive OR (XOR) is the area inside both circles except for the area where the two circles overlap. The two operations used in the CMOS circuits of MCUs are NAND (logical complement of AND) and NOR (logical complement of OR). Figure 1 shows a Venn diagram for all five of these operations. In logical operations performed in MCUs, 1 represents true and 0 represents false. The results of these operations are represented using truth tables instead of Venn diagrams. The AND operation outputs 1 if both inputs are 1, the OR operation outputs 1 if at least one input is 1, and the XOR operation outputs 1 if one input is 1 but the other is not. Table 1 summarizes these results in a truth table.



▲Table 1: Truth table, a truth table summarizes all input variables and possible output results of various logical formulas in tabular form.



■ Consider moving to the next digit when performing addition

Now, let's look at addition. As you can see from the XOR column of the truth table (Table 1), the logical operation of addition gives the same results as the XOR operation. If only one of the inputs is 1, the result of the operation is 1. Otherwise, the result is 0. However, when actually performing addition, we must consider carrying over to the next digit (carry). A circuit that can perform addition with carry function is called an adder. A full adder has not only a carry output but also a carry input function from the lower level. On the other hand, a half adder does not have such an input function. Therefore, when a carry occurs, a full adder performs an addition operation using the carry function, whereas a half adder does not add a carry because it cannot accept a carry input. Since the ALU performs multi-bit addition, it must have a full adder. This full adder performs addition operations with carry from lower digits.



▲Table 2: Adder truth table



Table 2(a) shows the truth table of a half adder, and Table 2(b) shows the truth table of a full adder. Next, let's look at how to write a logic circuit according to this table. If we can use XOR for sum (S or Sh) and AND for carry (C or Ch), things will be easier. However, because of the structure of CMOS circuits, we cannot write AND and OR circuits for the internal logic of MCUs. Instead, we have to use circuits such as NAND, NOR, and INV that invert the logic. Examples of such circuits are shown in Figures 2(a) and (b).


▲Figure 2: Adder



A multi-bit adder can be created by connecting full adders as shown in Figure 2(c). For example, in the case of an 8-bit ALU, eight full adders are connected, and in the case of a 16-bit ALU, 16 full adders are connected. However, since the least significant bit does not involve a carry from the lower digit, a half adder can be used instead of a full adder. In practice, it seems that half adders are often used for the first stage of a multi-bit adder.

■ Real MCU, incremental inverter attached, subtraction operation performed in one step



▲Figure 3: ALU logic circuit



The MCU performs subtraction indirectly using 2's complement. Since the adder has already been written, a subtractor can be created by adding a 2's complement circuit to it. By inverting each digit and adding 1 to the end, the 2's complement of a binary number can be generated. To do this, an inverter can be added to one of the input signals of the adder just written, followed by a switching circuit switch. Please refer to Figure 3 for its shape. In this circuit, SW0, SW1, and signal lines S0-S2 and s are added to the logic circuit for a full adder like that in Figure 2(b). From now on, I will explain each of these additional circuits one by one.

Let's look at SW0 first. When SW0 is connected to p, I1 is input to the adder 'as is', but when SW0 is connected to n, I1 is inverted. In this way, all the positions are inverted. The 2's complement can be obtained by inverting I1, inputting 1 to I0, and adding these two values. We can perform subtraction by storing this number in a register and adding its 2's complement in subsequent calculations.

In the ALU of an actual MCU, a circuit that adds 1 (called an incrementer) is attached to the inverter, so a subtraction operation can be performed in one step.

Since the purpose of this paper is to examine only the principles of the ALU, a circuit without an incrementer was used here to simplify the explanation.

■ AND circuit

Next, let's perform some logical operations. Take a closer look at Figure 2(a). Can you see that both AND and OR are hidden in it? Combining NAN1 and INV2 makes AND, and combining OR1, NAN2, and INV1 makes OR.

However, neither of these computational functions is available yet. First, we need to get AND and OR out of here. For this, we will use the additional circuits in Figure 3 mentioned above.

Before proceeding, we should note that instead of carrying (C), if we output the results of NAN1 and INV2 as S, an AND operation on I0 and I1 will be performed. Therefore, we will use SW1. If we need the AND operation function, we can change SW1 to a. Then, S will be the AND operation value of I0 and I1, which is composed of NAND1 and INV2. Here, we set s to 1. In this case, s does not affect the output value of NAND1 and is used to write OR.



▲Figure 4: ALU AND and OR circuits



This time, let's look at Figure 4(a). To make it easier to understand, only the elements that make up the AND circuit are highlighted in bold.

Now that we know a little more about AND circuits, let's go back to Figure 3 and think about OR circuits.

■ OR circuit

This time, OR1, NAN2, and INV1 are combined to form OR, and the signal s is used here. If s=0, the output of NAN1 is fixed to 1. Since this is the input value of NAN2 (i.e., the input value of NAN2 is fixed to 1), NAN2 operates in the same way as an inverter. As a result, since NAN2 becomes an inverter, the gate that synthesizes OR1 and NAN2 becomes a NOR.

Combining this NOR and INV1 results in OR. Finally, if SW1 is switched to o, S becomes the result of ORing I1 and I0.

This time, let's look at Figure 4(b). To make it easier to understand, only the elements that make up the OR circuit are highlighted in bold.

■ Inverter circuit

The last thing we need to do is to write the inverter circuit. You may remember that we added an inverter to i1 when we wrote the subtractor. So let's use it now. If you invert I1, input 0 into I0, and add these two values, you will get the inverted value of I1.

■ Control signals S0-S2 and s

The four signals (S0, S1, S2, and s) are used to switch the calculation function. These signals are sent from the decoder (which translates or decodes the instructions read from the flash memory) to the ALU and have the form of the signal value appropriate to the type of operation required (i.e. addition, subtraction, AND, OR, or inversion). These signals switch the ALU into various calculation units.

If the circuit shown in Figure 3 is connected n times, an n-bit ALU is formed.

■ Other circuits

The actual ALU contains more circuits than those mentioned above. Examples of these circuits include a carry look-ahead circuit for high-speed processing of only carry operations when the number of digits is large, a circuit that allows the operation to be passed without performing any operations, and a circuit that fixes I0 to 1 or 0. In addition, higher-performance MCUs sometimes have a multiplication circuit built into the ALU. Such circuits will be covered in another chapter.