Supports the latest semiconductor packaging processes
Global Semiconductor Packaging Market to Reach $42 Billion by 2025

ACM announced on the 27th a variety of wet wafer process product lines to advance the solution technologies of semiconductor back-end processing (OSAT) companies.

ACM's advanced wet wafer processing products, optimized to meet customer requirements, support the latest semiconductor packaging processes such as Cu pillar, Au bumping, TSV, and fan-out, and can be utilized across the entire semiconductor process chain including coating, developing, plating, planarization, photoresist strip, and etching.

According to Yole Dévelopment, a semiconductor market research firm, the global semiconductor packaging market size was USD 29 billion in 2019 and is expected to grow at a compound annual growth rate (CAGR) of 6.6% to USD 42 billion by 2025.

The share of advanced packaging in the overall packaging market is also expected to increase from 42.6% in 2019 to 49.4% in 2025 due to the slowdown in Moore's Law, integration across devices, and increasing demand for technological innovation in new areas such as 5G, artificial intelligence (AI), high-performance computing (HPC), and the Internet of Things (IoT).

ACM Research's wet wafer process products for wafer-level packaging are compatible with both 200 mm and 300 mm wafers and can be implemented in the following processes:

ECP (Electrochemical plating)
ACM’s proprietary ECP ap system achieves less than 5% wafer uniformity, less than 3% wafer-to-wafer uniformity, less than 2% repeatability, and less than 2.0µm within-die co-planarity. Additionally, the system can be configured with up to three load ports, up to four vacuum pre-wet chambers, up to 20 plating chambers, and up to four post-clean chambers. ACM’s ECP tool can be easily customized to meet customer requirements in WLP plating steps such as Cu, Ni, Sn/Sn-Ag pillar, solder bump, Au bump, and Cu RDL. It is also suitable for Fan-out, TSV, and TMV (Through-Mold Via) processes due to ACM’s exclusive diffusion plate and patented rubber seal.

SFP(Stress-Free Polishing)
Based on an electrochemical reaction mechanism, it is ideal for removing copper and upper barrier layers without causing mechanical fatigue, and is performed by integrating chemical mechanical polishing, wet etching, and dry etching processes. Chemicals such as electrolyte and wet etchant are recycled and reused in real time, reducing the amount of slurry used in the CMP process by more than 80%.

Coater
In the WLP lithography process, it performs important steps such as photoresist and polyimide coating, soft baking, and hexamethyldisiloxane (HMDS) application for vapor deposition. The system can achieve precise edge barrier removal using innovative methods and precise coating control. The configuration is highly customizable with options such as up to four coating chambers with ACM’s unique auto-clean function, one or two of a variety of photoresist nozzles, eight to fourteen hot plates, two to four cold plates, and one or two HMDS auto-cleaning chambers. ACM’s proprietary auto-cleaning technology in the coating chamber can reduce preventive maintenance time, especially in high-thickness photoresist coating processes of 100 µm or more.

Developer
ACM's developer system is designed for post-exposure bake, development and hard baking functions, supporting three PR development methods and double-sided processes. The system can be configured with up to four sets of development chambers, each containing one to five sets of liquid nozzles, and users can choose from two to four hot plates and two to four cold plates.

Wet etcher
ACM's wet etch system uses a variety of chemistries to remove excess under-bump metal from the wafer, and its smart-sequence recipe capability allows for combining metal etch processes such as Cu and titanium (Ti) etching. This can be performed in a scheduled sequence in a single system. The system can be customized to user needs with four or eight single-wafer etch chambers, can handle up to five chemistries, and allows double-sided processing and reuse of two chemicals.

Photoresist strip
ACM's high-efficiency wet stripping system designed for PR removal performs bench soaking and single spin PR removal processes in one device with one integrated tank and four single wafer chambers. First, the wafers are soaked in a solvent tank that holds multiple wafers at a time to improve throughput, then transferred to the single wafer module for enhanced wafer control, where chemicals are sprayed onto the rotating wafers. The single strip chamber performs double-sided processes and allows the reuse of two chemicals. SAPS Megasonic, which assists in residue removal in the single strip chamber, can be used for the critical stripping process to improve product yield.

Scrubber
ACM's scrubber system is designed to achieve high particle removal efficiency in both integrated chip manufacturing and wafer-level packaging (WLP) processes using a variety of cleaning methods. High-pressure deionized water is mixed with carbon dioxide (CO2) to create a dual-fluid spray cleaner that combines both liquid and gaseous chemicals. Soft brushes are also available to remove particles of different sizes. The system can be supplemented with ACM's proprietary SAPS megasonic cleaning technology and a wafer flip function for double-sided cleaning. The scrubber system is compatible with silicon and glass substrates as well as bonded wafers.