Accelerating adoption of top-side cooling packages in new application designs
TO247·TO220 replacement… Top-side cooling technology market introduction ↑

Infineon Technologies AG (hereinafter referred to as Infineon) has registered a top-side cooled (TSC) package to the JJEDEC standard, which improves power density by more than two times compared to TO247 and TO220 and reduces the BOM, thereby lowering overall system cost.

Infineon announced today that it has registered its QDPAK and DDPAK top-side cooled (TSC) packages, which are ideal for high-voltage MOSFETs, as JEDEC standard.

Power density and cost optimization are becoming increasingly important for developing efficient high-power applications for electric vehicles.

Now, a single standard package and footprint accelerates widespread adoption of top-side cooling packages in new application designs.

It also provides OEMs with the flexibility to differentiate their products and enable next-level power density in a variety of applications.

JEDEC is a standards organization with over 50 years of history that has developed open standards and documentation for a variety of technologies, including package outlines, for the microelectronics industry.

JEDEC has widely accepted semiconductor packages such as TO220 and TO247 through-hole devices (THDs).

Over the past several decades, these The package has been used primarily and is still used today in modern onboard charger (OBC) designs as well as high-voltage (HV) and low-voltage (LV) DC-DC converters.

Now, with the QDPAK and DDPAK surface mount (SMD) top-side cooling packages listed as standard, we are accelerating the widespread market adoption of top-side cooling technology, replacing TO247 and TO220 respectively.

Infineon designed these devices to provide improved electrical performance with the same thermal performance, allowing customers to easily transition from TO220 and TO247 THD devices to QDPAK and DDPAK SMD devices.

Based on the standard 2.3 mm height of the QDPAK and DDPAK SMD top-side cooled packages, developers can now design applications such as OBCs or DC-DC converters using SMD top-side cooled devices with the same height.

Therefore, compared to existing solutions requiring a 3D cooling system, the design is easier and the system cost for cooling can be reduced.

Additionally, top-side cooling packaging provides up to 35 percent lower thermal resistance than standard bottom-side cooling (BSC).

Top-side cooling packages allow for the use of both sides of the PCB, improving board space utilization and at least doubling power density.

Thermal isolation from the substrate also improves package thermal management.

This is because the thermal resistance of the leads is much higher than that of the exposed top surface of the package.

The improved thermal performance eliminates the need to stack boards. A single FR4 is sufficient to mount all components without the need to use FR4 and IMS together, and fewer connectors are also required.

Therefore, it reduces the bill of materials (BOM) and lowers the overall system cost.

In addition to improving thermal performance and power capacity, top-side cooling technology can optimize power loop design to improve reliability.

This is possible by placing the driver very close to the power switch.

Low stray inductance in the driver switch loop reduces loop parasitics, which lowers ringing at the gate, improving performance and reducing the risk of failure.