[Editor's Note] The semiconductor industry's NAND flash stacking has surpassed 200 layers. Previous comments that it would be difficult for any company other than Samsung Electronics, which has a single stack of 128 layers, to surpass 200 layers were rendered meaningless by none other than Micron of the United States, which has stacked 232 layers. Not to be outdone, SK Hynix has jumped into the 200-layer race by announcing the commercialization of 238-layer NAND flash. Samsung, which installed its 172-layer 7th-generation V-NAND on UFS 4.0 earlier this year, appears to be taking a wait-and-see approach, but it has expressed confidence by saying that it has already completed securing 200-layer technology. We take a look at the clash between semiconductor manufacturers in the 200-layer NAND era.

■Unleashed stacking competition, surpassing 200 layers
Since Samsung Electronics announced its 24-layer first-generation 3D NAND in 2013, 3D NAND flash, which stacks cells vertically rather than horizontally, has become the industry standard. This allows for increased integration and reduced area, so all manufacturers are currently working on stacking cells.

Micron Technology (hereinafter referred to as Micron) opened the door to the 200-layer era by unveiling 232-layer NAND flash at the end of July. It was the first in the world to mass-produce 200-layer NAND flash, earning the title of technology leader. Micron achieved improved packaging with a 45% higher density and 28% smaller width and height of 11.5×13.5mm compared to the previous generation of 176-layer.

SK Hynix quickly reported the news of its development of 238-layer NAND flash. It is 6 layers higher than Micron, but it is not yet at the mass production stage. Micron emphasized on its blog that “prototyping an innovative semiconductor design is indeed difficult, but applying 3D NAND to mass production is an even bigger challenge,” emphasizing that realizing a mass production system is a bigger hurdle than development.

SK Hynix is said to have currently presented sample products to customers and plans to begin mass production in the first half of next year. An SK Hynix official explained, “We increased the number of layers to minimize the horizontal and vertical area, and thus implemented the world’s smallest NAND flash.” This was possible because the area could be reduced by stacking more cells to increase unit capacity, and as a result, productivity could be increased by 34% compared to the previous generation of 176 layers.

Chinese memory company YMTC also recently announced that it has successfully developed the 4th generation 3D 232-layer NAND. YMTC, whose parent company is Tsinghua Unigroup, is a state-owned semiconductor company owned by the Chinese government and is competing in the stacking competition with full support from China's semiconductor powerhouse.

Samsung Electronics is relatively late in releasing its products in this 200-layer competition. Last May, Samsung Electronics announced the development of UFS 4.0 standard memory using the 7th generation 176-layer V-NAND. Samsung’s 7th generation 176-layer V-NAND has a similar height to the 6th generation V-NAND in the early 100-layer range, achieving the minimum cell size.

Contrary to expectations that Samsung, which possesses such outstanding technology and the highest single-stack 128-layer single-stack NAND flash, would be the first to mass-produce 200-layer NAND flash, there is still no news of mass production of 200-layer products. SK Hynix and Micron, which have already released 230-layer products with double stacking, have also secured the technology to implement 128 layers in a single stack.

Last year, Samsung declared in a contribution by Song Jae-hyeok, head of the Flash Development Division of the Memory Business Division, that “Samsung Electronics’ V-NAND is looking at over 1,000 layers.” He explained that they have already secured 8th generation V-NAND operating chips with over 200 layers in terms of technology and are preparing to introduce products at the right time depending on market conditions and customer demands. A year after this contribution, while competitors are announcing plans to mass produce 200-layer NAND, Samsung Electronics is still silent on its 200-layer NAND.

■1000-layer NAND future, overcoming stacking limitations is a must
Song Jae-hyeok, head of flash development at Samsung Electronics’ memory business division, said in a contribution last year that he sees the future of Samsung Electronics’ V-NAND reaching 1,000 layers or more. He expressed confidence in Samsung Electronics’ technological innovation in the future 1,000-layer V-NAND era, saying, “We will be the first to overcome the height limit that we will face someday through 3D scaling technology.”

The semiconductor industry is faced with a situation where it must solve technical problems as the number of cell stacks increases. In addition, even if it is technically feasible, the maturity of the process for mass production, such as yield and productivity issues, must be supported.

3D NAND stacking requires depositing multiple thin layers, and as the number of layers increases, there may be deviations between each cell. This deviation affects product performance, and if there are too many layers, there is also a greater chance of collapse. Therefore, durability to withstand impact is required, and the design difficulty also increases.

SK Hynix has stated through its newsroom that the most difficult part of stacking is the plug process. The plug process is the process of piercing the oxide/nitride stack (ON stack) that is stacked in layers. As the number of stacked layers increases, deeper holes must be drilled for the same plug size.

At this time, a semiconductor film must be formed inside for the operation of the element, but the deeper the depth, the more difficult it is to form a uniform circuit line width. No matter how sophisticated the etching technology is, there will be a difference in thickness and shape between the upper and lower circuit line widths, and this can cause continuous stress to be applied to the lower element, he explained.

An SK Hynix official said in a phone call with our newspaper, “When the 72-layer product with double stacking came out in the past, there were many doubts about whether the 100-layer level could be released in the future, given the 36-layer single stack level.” He continued, “With the innovation of process technology, we are now looking forward to hundreds of layers or more, thanks to the advancement of equipment and design technology that nicknames cells.”