삼성전자가 업계 최초로 36GB(기가바이트) HBM3E(5세대 HBM) 12H(High, 12단 적층) D램 개발에 성공하고 고용량 HBM 시장 선점에 나선다.
8-stage same height utilizing Advanced TC NCF technology
Performance and capacity both improved by more than 50% compared to the existing 8-stage
Samsung Electronics has succeeded in developing the industry's first 36GB (gigabyte) HBM3E (5th generation HBM) 12H (High, 12-layer stacked) DRAM and is moving to dominate the high-capacity HBM market.
Samsung Electronics announced on the 27th that it has implemented the industry's largest capacity, 36GB HBM3E 12H, by stacking 24Gb (gigabit) DRAM chips up to 12 layers using TSV (Through-Silicon Via) technology.
HBM3E 12H provides a bandwidth of up to 1,280 GB per second and the largest capacity to date, 36 GB, improving both performance and capacity by more than 50% compared to its predecessor, HBM3 (4th generation HBM) 8H (8-layer stacking).
Samsung Electronics satisfied the HBM package specifications by implementing a 12H product with the same height as an 8H product using 'Advanced TC NCF' (Thermal Compression Non Conductive Film) technology.
The application of 'Advanced TC NCF' technology has the advantage of minimizing the 'warping phenomenon' that can occur as the number of HBM stacks increases and the chip thickness decreases, making it advantageous for high-level stacking expansion.
Samsung Electronics has also continuously reduced the thickness of NCF materials, thereby achieving the industry's smallest chip-to-chip ratio. The gap of '7 micrometers (㎛)' was implemented. Through this, a vertical integration density improved by more than 20% compared to HBM3 8H was realized.
In particular, in the process of joining chips, small bumps were applied to places where signal characteristics were required, and large bumps were applied to places where heat dissipation characteristics were required, with sizes that were appropriate for the purpose. By applying bumps of different sizes, thermal characteristics were enhanced while also maximizing yield.
Samsung Electronics also showcased its industry-leading technology to coat with NCF and bond chips to vary bump sizes while simultaneously stacking without voids.
Samsung Electronics' HBM3E 12H, which it successfully developed, is expected to be the best solution for various companies utilizing AI platforms in a situation where data processing volume is rapidly increasing due to the advancement of AI services.
In particular, when using this product with increased performance and capacity, it is a great advantage that it allows flexible resource management, such as reducing GPU usage, which allows companies to reduce the total cost of ownership (TCO).
For example, applying HBM3E 12H to a server system is expected to improve AI learning training speed by an average of 34% compared to when HBM3 8H is installed, and in the case of inference, it is expected to be possible to serve up to 11.5 times more AI users.
Samsung Electronics Memory Business Unit Product Planning Office Vice President Bae Yong-cheol said, “Samsung Electronics is working hard to develop innovative products that meet the high-capacity solution needs of customers providing AI services,” and “Going forward, we will lead and pioneer the high-capacity HBM market by focusing on technology development for high-level stacking of HBM.”
Samsung Electronics has started providing samples of HBM3E 12H to customers and plans to mass produce it in the first half of the year.