과학기술정보통신부 산하 한국기계연구원(원장 류석현) 자율제조연구소 반도체장비연구센터 김형우 선임연구원 연구팀과 성균관대학교(총장 유지범) 기계공학부 김태성 교수 연구팀은 플라즈마를 이용한 이종구조 4인치 반도체 웨이퍼 제작에 세계 최초로 성공했다. 이 기술은 차세대 반도체 재료인 TMDc에 적용, AI반도체로 사용 가능할 전망이다.
Korea Mechanical Engineering & Construction Co., Ltd., the world's first TMDc·graphene heterostructure large-area semiconductor production
With the development of artificial intelligence (AI) technology, the need for improved semiconductor performance has also increased. The development of new materials and structures for high-performance semiconductors is also an important task. The world's first heterogeneous 4-inch manufacturing technology that can produce low-power, high-performance semiconductors using plasma equipment has been developed.
The research team of Senior Researcher Hyungwoo Kim of the Semiconductor Equipment Research Center of the Autonomous Manufacturing Research Institute of the Korea Institute of Machinery and Materials (President Seok-Hyeon Ryu) under the Ministry of Science and ICT and the research team of Professor Taesung Kim of the Department of Mechanical Engineering at Sungkyunkwan University (President Ji-Beom Yoo) succeeded in producing a heterostructure 4-inch semiconductor wafer using plasma for the first time in the world. This technology is expected to be applied to TMDc, a next-generation semiconductor material, and used as an AI semiconductor.
TMDc (Transition Metal Dichalcogenides) have a two-dimensional structure with an atomic layer thickness and performance similar to silicon, enabling low-power operation and fast switching speed, making them the most promising next-generation semiconductor candidates. They are particularly suitable for neuromorphic systems and are currently being used in machine learning, deep learning, and cognitive computing. Representative materials include molybdenum disulfide (MoS₂), tungsten disulfide (WS₂), and molybdenum diselenide (MoSe₂).
The research team succeeded in implementing two types of heterostructure 4-inch wafers using plasma-enhanced chemical vapor deposition (PECVD) equipment. First, the heterostructure between tungsten disulfide (WS2) and graphene was fabricated by depositing a 1-nanometer (nm) thick tungsten (W) metal layer on a graphene-transferred wafer and then performing hydrogen sulfide (H2S) plasma sulfidation treatment.
In addition, by combining two different shapes of molybdenum disulfide (MoS2), they succeeded in producing a thin film with a 'metal-semiconductor' heterostructure. In particular, the metallic structure (1T), which is an orthorhombic structure, is in a metastable state and is relatively unstable compared to the semiconducting structure (2H), which is a hexagonal honeycomb structure, making it difficult to produce large-area semiconductor wafers. With this technological development by the research team, they succeeded in producing 4-inch 1T wafers and implementing the 1T-2H heterostructure.
The existing heterostructure manufacturing method, the 'stacking' method, was only possible in small sizes of several hundred micrometers (㎛) and had poor reproducibility. The research team overcame these limitations by utilizing plasma synthesis equipment, and achieved the result of implementing a 4-inch large-area heterostructure wafer. When a 3D integrated structure is implemented with this technology, power loss is greatly reduced and heat emission is reduced, improving performance and energy efficiency. It has low power and high performance, which are essential features of AI semiconductors.
Kim Hyeong-woo, a senior researcher at the Korea Institute of Machinery and Materials, said, “The significance of the technology developed this time is that it enabled experimental elucidation by satisfying the wafer size and reproducibility in heterostructure research, which had previously been approached only academically,” and “It utilizes PECVD, which is used in the semiconductor industry, and has high potential for mass production, so it will contribute to improving the performance and industrialization of AI semiconductors in the future.”
The two types of heterogeneous structure 4-inch wafer manufacturing technology developed by the Korea Institute of Machinery and Materials has secured the original technology through U.S. and domestic patent registration. It was also selected as a cover paper for the renowned international academic journals 'Advanced Materials' and 'Energy & Environmental Materials'.
Meanwhile, this study was conducted with the support of the basic project of the Korea Institute of Machinery and Materials, the ‘Development of Original Technology Based on Plasma Equipment for Core Processes in the Semiconductor and Display Industries’, the Creative Challenge Research Project of the Korea Institute of Machinery and Materials, and the Human Resources Development Support Project of the Ministry of Trade, Industry and Energy.