높은 데이터 대역폭과 저전력 요건이 필수적인 최신 패키징 공정에서 전자파 공학에 기반을 둔 전기적 설계는 시스템 반도체 개발에 중요한 요소이다. 이러한 패키징 기술과 전자파 공학이 융합된 최신 기술 연구 결과를 공유하는 자리가 마련됐다.

▲2023 High-Speed Interconnect and Package Design Workshop Poster (Image: Korean Institute of Electromagnetic Engineering and Science)
High-Speed Interconnect and Package Design Workshop Held on the 22nd
Lecture on the Future Prospects of Packaging Design Technology in the Age of Artificial Intelligence
Electromagnetic Wave & Packaging, Millimeter Wave, High-Speed Interconnect Technology Session
In the latest packaging processes where high data bandwidth and low power requirements are essential, electrical design based on electromagnetic engineering is a critical element in the development of system semiconductors. A venue has been set up to share the latest research results that combine packaging technology and electromagnetic engineering.
The '2023 High-Speed Interconnect and Package Design Workshop' hosted by the Korea Institute of Electromagnetic Engineering and Science (KIEES) High-Speed Interconnect and Package Research Group will be held at the Yangjae aT Center on the 22nd.
As semiconductor microfabrication approaches its limits and solutions to packaging are being sought throughout the semiconductor industry, the High-Speed Interconnect and Packaging Research Group under the Korean Electromagnetic Engineering Society will hold workshops starting this year to respond to new trends in the packaging field and help secure competitiveness in the domestic package design field.
A lecture will be held to look into the future of packaging design technology in the era of artificial intelligence that has become a reality. On this day, Professor Kim Jeong-ho of the Korea Advanced Institute of Science and Technology, the first chairman of the research society, will present a keynote speech on the topic of ‘ChatGPT Artificial Intelligence Development and the Future of Semiconductor Packaging.’
In addition, the technology seminar will feature lectures on a variety of timely topics, including the latest research trends in packaging and interconnect technologies, performance optimization and machine learning design techniques, shielding and material applications, and packaging for millimeter-wave/terahertz wireless modules.
In the first part of the technology session, Professor Kim Ji-seong of the Korea Advanced Institute of Science and Technology (KAIST) will serve as the moderator, and Professors Ahn Seung-young and Park Hyeon-ho will participate to present on: △ Research trends in next-generation semiconductor packaging technology △ Electromagnetic shielding technology for semiconductor packaging, etc.
The second part of the technology session will be moderated by Kim Jong-hoon, CEO of EMC Doctors, and Professors Kim So-young and Hong Won-bin will present on topics such as △High-speed interconnect design using machine learning △Challenges and overcoming strategies for millimeter-wave and terahertz wireless modules based on heterogeneous packaging, etc.
Han Ki-jin, chairman of the High-Speed Interconnect and Packaging Research Group, said, “I hope that the newly launched ‘High-Speed Interconnect and Package Design Workshop’ will become a representative workshop in the field of package design that helps mutual cooperation and information exchange among experts from academia, industry, and research,” and added, “I hope that Korea’s semiconductor packaging technology will improve amidst the increasingly fierce technological competition.”
Meanwhile, pre-registration is available until the 15th on the website of the Korean Institute of Electromagnetic Engineering and Science.