As AI workloads rapidly increase, the demand for semiconductor chips with superior functionality is increasing. As AI miniaturization is required at a level that cannot be handled by traditional Moore’s Law, semiconductor manufacturers are actively adopting heterogeneous integration manufacturing technology that integrates multiple chiplets into a cutting-edge package to provide performance and bandwidth equal to or greater than monolithic chips.

Applied Materials, a global leader in materials engineering solutions, today announced a strategic partnership with Ushio to accelerate the industry roadmap for heterojunction chiplet manufacturing in 3D packages.

This partnership will also see the launch of a digital lithography system specifically designed for cutting-edge substrate patterning required for the era of artificial intelligence (AI) computing.

The semiconductor industry requires large package substrates based on new materials such as glass that can implement ultra-fine interconnect pitches and excellent electrical and mechanical properties. Applied, which has technological prowess in panel processing, and Ushio, which has expertise in packaging lithography, expect this partnership to accelerate the paradigm shift toward heterojunction.

The new digital lithography technology (DLT) system delivers the resolution required for cutting-edge substrate applications and the throughput required for mass production. With the DLT system capable of patterning lines with a line width of less than 2 micrometers (µm), semiconductor manufacturers can implement chiplet architectures on all types of substrates, including wafers, glass, and large panels made of organic materials.
The DLT system is specifically designed to address unexpected substrate warpage issues and provide overlay accuracy. The system has already been delivered to many customers in production, and 2µm patterning has been successfully implemented on a variety of cutting-edge package substrates, including glass substrates.

Applied Materials has pioneered DLT system-based technologies and plans to continue and expand its research and development for advanced packaging line widths of 1µm or less through collaboration with Ushio. Ushio has accelerated the adoption of DLT by leveraging its rich manufacturing technology and face-to-face customer infrastructure.

“Applied’s new DLT is the first patterning system to directly address our customers’ leading-edge substrate roadmap needs,” said Sundar Ramamurthy, vice president and general manager of Applied’s Heterojunction, ICAPS, Epitaxy and Semiconductor product groups. “Applied is leveraging our unparalleled expertise in large substrate processing, the industry’s broadest portfolio of heterojunction technologies, and deep R&D resources to support the next generation of innovation in high-performance computing.”

“Ushio has been building lithography systems for packaging applications for nearly 20 years, delivering over 4,000 tools worldwide,” said William F. Mackenzie, group chief executive officer and general manager of Ushio’s Photonic Solutions Global Business Unit. “With this new partnership, Ushio will expand our portfolio to accelerate the adoption of DLT and solve pressing challenges in the rapidly evolving packaging technology space with a highly scalable manufacturing ecosystem and robust field service infrastructure.”