Multi-Channel Real-Time Video Processor Design with Xilinx Zynq All Programmable SoC

Processing, distributing, displaying, and storing multiple video streams in various formats is an extremely challenging task that can involve complex video operations such as deinterlacing, scaling, chroma upsampling, color correction, and alpha blending. Typical end products requiring these functions include multiviewer displays, video switches, multi-channel video routers, and multi-stream up/down converters. While designing a system capable of performing all these video processing tasks in real time typically requires the use of multiple video chips, it is now possible to achieve the same results with a single Xilinx® Zynq®-7000 All Programmable SoC device. This device utilizes the OSVP Scalable Video Processor IP core from OmniTek, a member of the Xilinx Alliance Program. The Xilinx Zynq-7000 All Programmable SoC represents a relatively new alternative technology in the embedded video field, addressing the real-time video processing challenge in a distinctly different yet effective manner. This unique Zynq architecture combines ARM® Cortex®-A9 dual processor cores with programmable hardware and programmable I/O, enabling the implementation of a real-time video processing chain with complex software-driven control functions using the Zynq-7000 SoC. The OmniTek OSVP Scalable Video Processor core provides comprehensive multi-video format conversion and composition capabilities in a single IP block. This includes video input processing and conversion functions, input video crosspoint switch, hardware video processing chain (consisting of chroma upsampler, color space converter, deinterlacer, cropper, resizer, frame synchronizer, and video combiner), and output video crosspoint switch. Additionally, these ARM processors execute a complete Linux operating system on the Qt framework, which includes video I/O device drivers and video processing APIs. This webinar demonstrates and explores a new Real Time Video Engine (RTVE 2.1) reference design based on the OmniTek OSVP core and running on the Xilinx Zynq-7000 All Programmable SoC. The RTVE 2.1 reference design accommodates 2, 4, or 6 video input channels over SDI or HDMI, combines these streams in real time while performing any required format conversion operations, adds software-generated overlays through alpha blending, and outputs the resulting combined live multiview video stream over SDI or HDMI. Target Audience: This technical webinar is suited for embedded systems designers, software engineers, and hardware engineers who are seeking ways to meet aggressive system design objectives quickly and efficiently while minimizing design risk.