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웨비나
High-Capacity Bandwidth Memory Solution Using Intel FPGA
- Stratix 10 MX HBM2 (High Bandwidth Memory) Usage Methods and Architecture Overview
Recent applications require multiple memory solutions to handle high-performance computing and large-scale data processing. Conventional simple memory circuit design techniques have proven inadequate in meeting the throughput requirements demanded by new applications.
Intel has therefore integrated HBM (High Bandwidth Memory) into Stratix 10 products. This enables a 10-fold performance improvement and lower power consumption compared to conventional discrete memory solutions.
In this webinar, we will explain the HBM architecture within the FPGA and introduce the configuration methods for the Memory Controller IP within the FPGA device that controls HBM memory, as well as the simulation environment. Finally, we will demonstrate the performance capabilities of HBM Memory using the S10 MX Development Kit.
Recent applications require multiple memory solutions to handle high-performance computing and large-scale data processing. Conventional simple memory circuit design techniques have proven inadequate in meeting the throughput requirements demanded by new applications.
Intel has therefore integrated HBM (High Bandwidth Memory) into Stratix 10 products. This enables a 10-fold performance improvement and lower power consumption compared to conventional discrete memory solutions.
In this webinar, we will explain the HBM architecture within the FPGA and introduce the configuration methods for the Memory Controller IP within the FPGA device that controls HBM memory, as well as the simulation environment. Finally, we will demonstrate the performance capabilities of HBM Memory using the S10 MX Development Kit.
[Intel® Stratix® 10 FPGA]
[Webinar Key Topics]
- Memory Bandwidth Challenge
- Stratix 10 MX (DPRAM SiP) Solution
- Architecture Details
- Hard Memory Controller
- HBM Simulation Environment
- S10 MX Operating Demo
댓글
- 39 Comments
- 이*희 (2018-09-17 오전 10:11:24)
- 좋은 강의 잘 들었습니다.
- 박*선 (2018-09-13 오전 11:40:00)
- 메모리버스가 어떻게 연결되었는지 궁긍하네요..
- 홍*기 (2018-09-12 오후 1:46:46)
- CPU에 내장된 Memory Controller는 HBM을 언제부터 적용될까요?
- 공*철 (2018-09-12 오전 11:30:37)
- 굉장히 궁금한 분야 였는데..좋은 세미나기대 하겠습니다
- 이*열 (2018-09-12 오전 11:25:12)
- 좋은 내용 감사합니다.
- 신*욱 (2018-09-12 오전 11:24:40)
- 아.. 막상 등록하고 나니 회의가 있네요. ㅠㅠ
- 김*기 (2018-09-12 오전 11:12:31)
- 향후 HBM2가 DDR을 대체하는 수단이 될지 궁금합니다.
- 권*구 (2018-09-12 오전 10:54:00)
- 좋은 내용 기대하고 있습니다
- 오*익 (2018-09-12 오전 10:49:16)
- 유익한 시간이 될 것으로 기대됩니다.
- 권*종 (2018-09-12 오전 10:47:37)
- 좋은 세미나 기대 합니다. ^^