웨비나
Analysis of Recent CPU Architecture Implemented in Linux Kernel Source
This webinar is a technical seminar sponsored by Mouser.
The RISC-V architecture, which has recently emerged as the hottest issue in the microprocessor market, is being added to arch/riscv starting from the latest version of the Linux kernel (4.15 and later).
Until now, CPU architectures have been dominated by Intel's x86 family and ARM's Cortex family, but current microprocessors are rapidly transitioning from 32-bit to 64-bit.
Moreover, since machine learning and deep learning environments require increasing CPU speed and memory capacity by more than 1000 times, the pace of this transition to 64-bit will accelerate even further.
The RISC-V architecture that has emerged in this era has many advantages.
1. Anyone can use it freely without licensing fees.
2. It natively provides 64-bit architecture.
3. It is power efficient.
4. The instruction set is efficiently designed.
5. Registers for floating-point arithmetic are separately designed.
6. Atomic operations, locking, and memory barrier instructions are simplified, making it efficient for parallel processing.
While there are many other advantages, this seminar (training) will focus on explaining the above points in an easy-to-understand manner.
Main Topics
- Important factors in evaluating CPU performance
- Why RISC-V architecture's instruction set is efficient
- Atomic operations, locking, and memory barriers implemented in Linux kernel source
- Significant impact on parallel processing
Through this seminar, I hope it becomes an opportunity for you to develop further by understanding Linux kernel source and CPU architecture more easily.
The RISC-V architecture, which has recently emerged as the hottest issue in the microprocessor market, is being added to arch/riscv starting from the latest version of the Linux kernel (4.15 and later).
Until now, CPU architectures have been dominated by Intel's x86 family and ARM's Cortex family, but current microprocessors are rapidly transitioning from 32-bit to 64-bit.
Moreover, since machine learning and deep learning environments require increasing CPU speed and memory capacity by more than 1000 times, the pace of this transition to 64-bit will accelerate even further.
The RISC-V architecture that has emerged in this era has many advantages.
1. Anyone can use it freely without licensing fees.
2. It natively provides 64-bit architecture.
3. It is power efficient.
4. The instruction set is efficiently designed.
5. Registers for floating-point arithmetic are separately designed.
6. Atomic operations, locking, and memory barrier instructions are simplified, making it efficient for parallel processing.
While there are many other advantages, this seminar (training) will focus on explaining the above points in an easy-to-understand manner.
Main Topics
- Important factors in evaluating CPU performance
- Why RISC-V architecture's instruction set is efficient
- Atomic operations, locking, and memory barriers implemented in Linux kernel source
- Significant impact on parallel processing
Through this seminar, I hope it becomes an opportunity for you to develop further by understanding Linux kernel source and CPU architecture more easily.
댓글
- 40 Comments
- 변*환 (2018-08-28 오전 10:39:27)
- 업무 관련 연관이 있어 도움이 될 것 같습니다.
- 박*원 (2018-08-09 오전 11:20:08)
- 좋은 내용으로 부탁드립니다
- 임*재 (2018-08-09 오전 11:05:16)
- 관심있게 연구하던 분야이어서 기대됩니다.
- 여*동 (2018-08-09 오전 10:19:46)
- 기대 많이 됩니다
- K*******u (2018-08-09 오전 9:31:16)
- 좋은 내용으로 부탁드립니다
- 주*규 (2018-08-08 오전 11:31:10)
- 내일이군요. 기대됩니다.
- 주*규 (2018-08-08 오전 11:30:07)
- 감사합니다.
- 홍*희 (2018-08-07 오후 6:53:08)
- 학습에 많은 도움이 됩니다. 감사합니다.
- 강*완 (2018-08-07 오후 5:53:47)
- 본 필자 석사논문과 연관성 높아 관심 폭팔.....놓히지 않아야할 텐데
- 조*우 (2018-08-07 오전 9:01:52)
- 정대표님, 항상 리눅스 세계에서 새로운 주제로 세미나를 열어 주셔서 감사합니다.