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Design and Verification Methods for 3D IC-Package and HDAP Implementation
The Xpedition IC Packaging solution is optimized for HDAP (High Density Advanced Packaging) design, an emerging packaging domain. It provides the most comprehensive integrated design and verification solution for TSMC's FOWLP applied since Apple iPhone 7, as well as CoWoS, SiP, High Pin-count Flip-Chip Package, and HBM-based Interposer Based Package design widely used in artificial intelligence and high-performance graphics cards.
In this webinar, we will first provide methods for implementing and optimizing 3D IC-Package and HDAP through XSI and physical routing methodology through XPD. Through Calibre 3DSTACK verification, we provide users with a more accurate and faster new integrated solution.
First, through Xpedition Substrate Integrator, XSI, connection optimization from heterogeneous IC-Package to PCB Board Level can be implemented, and the most suitable packaging solution can be established through various design planning. Additionally, through the Calibre 3DSTACK Wizard included in XSI, Integration Net List and Assembly output files for heterogeneous LVS and DRC verification can be extracted accurately and quickly.
Second, Xpedition Package Designer, XPD, is directly integrated with XSI and enables physical routing based on optimized connection information. It provides diverse design methodologies including new design methodologies for FOWLP and Interposer Based Package design methodologies required for ASIC <-> HBM design.
Third, both XSI and XPD provide package-specific verification methodologies required by users through direct integration with Calibre 3DSTACK (LVS, DRC), and offer an integrated solution for verifying heterogeneous 3D IC-Package.
We look forward to your participation in the Xpedition IC Packaging webinar on September 17th and hope it will be a valuable session. Thank you.
In this webinar, we will first provide methods for implementing and optimizing 3D IC-Package and HDAP through XSI and physical routing methodology through XPD. Through Calibre 3DSTACK verification, we provide users with a more accurate and faster new integrated solution.
First, through Xpedition Substrate Integrator, XSI, connection optimization from heterogeneous IC-Package to PCB Board Level can be implemented, and the most suitable packaging solution can be established through various design planning. Additionally, through the Calibre 3DSTACK Wizard included in XSI, Integration Net List and Assembly output files for heterogeneous LVS and DRC verification can be extracted accurately and quickly.
Second, Xpedition Package Designer, XPD, is directly integrated with XSI and enables physical routing based on optimized connection information. It provides diverse design methodologies including new design methodologies for FOWLP and Interposer Based Package design methodologies required for ASIC <-> HBM design.
Third, both XSI and XPD provide package-specific verification methodologies required by users through direct integration with Calibre 3DSTACK (LVS, DRC), and offer an integrated solution for verifying heterogeneous 3D IC-Package.
We look forward to your participation in the Xpedition IC Packaging webinar on September 17th and hope it will be a valuable session. Thank you.
댓글
- 31 Comments
- 이*규 (2019-09-17 오전 11:33:06)
- 지멘스가 멋지긴하네요
- 오*진 (2019-09-17 오전 10:32:14)
- 좋은 강의 부탁드립니다.
- 조*균 (2019-09-17 오전 10:17:12)
- 알차네요
- 김*태 (2019-09-17 오전 10:12:14)
- 좋은 강의 기대가 됩니다~^^
- 신*영 (2019-09-17 오전 10:09:33)
- 기대합니다
- 이*진 (2019-09-17 오전 10:03:58)
- 기대됩니다.
- 최*휴 (2019-09-17 오전 9:57:45)
- 기대합니다.
- 최*휴 (2019-09-17 오전 9:57:45)
- 기대합니다.
- 김*진 (2019-09-16 오전 11:18:34)
- 업무에 도움이되는 자료 기대합니다
- 나*엽 (2019-09-11 오후 1:55:12)
- 좋은 세미나 기대합니다~