Modular architecture Up to 12 chamber configurations, 3rd party chambers available
Thousands of sensors verify massive data, maintaining consistency throughout the chamber
Applied Materials has launched a new etching solution that maximizes productivity in 30% less space than existing solutions, solving production issues for semiconductor manufacturers such as production yield and sustainability.
Applied Materials held a press conference on the 30th to introduce its recently launched new wafer production platform, ‘Vistara’.
Vistara, introduced that day, is expected to provide flexibility, intelligence, and sustainability to solve the aforementioned semiconductor production problems by addressing the following concerns of semiconductor makers: △Complexity increased more than fourfold due to the change from 2D to 3D structure, △Increased cost per unit area, △Increased time due to changes in road-to-road, and △Carbon emissions due to increased energy consumption.

▲Jang Dae-hyun, head of memory etching technology, introduces the ‘Vistara’ platform.
Vista's modular architecture allows for configurations of from four to twelve chambers, and can be used with third-party chambers to create a new type of vacuum integration solution.
This provides customers with integrated material solutions, flexibility in productivity and installation space.
Additionally, there are thousands of sensors providing real-time control data. Included, application software including the AIx platform uses this data to help customers accelerate R&D by dramatically reducing equipment and chamber matching and post-maintenance startup periods.
Here, design and software intelligence are used to dynamically optimize pump and vent times, helping chipmakers reduce defects and maximize yield.
It also significantly improved sustainability, a hot topic in the semiconductor industry. Applied has redesigned the gas panel to optimize how the Vistara platform uses sub-fab components, including pumps, heat exchangers and chillers.
These improvements will reduce energy consumption by up to 35 percent compared to previous platforms, helping chipmakers reduce their Scope 1 (direct carbon emissions) and Scope 2 (indirect carbon emissions) greenhouse gas emissions.
Vistara allows chipmakers to maximize cleanroom space by installing more systems per square foot.
Vistara integrates 12 etch chambers to deliver the same productivity of two existing Sendless platforms in 30 percent less space.
When building a new fab, chipmakers can achieve target wafer throughput in a smaller cleanroom while also reducing the amount of energy used during fab construction.
Applied's new Eco Twin software is also included to help chipmakers monitor and optimize the energy and material consumption of their process recipes for additional environmental savings.
Jang Dae-hyun, head of memory etching technology, who was in charge of the presentation, said, “Vista is a representative platform of sustainability that can reduce chemical usage by 30% and material usage as well. It is the ultimate semiconductor solution for chip manufacturing flexibility, intelligence, and sustainability.”

▲'Vistara' platform
■ Applied supports heterogeneous chip combinations that can significantly reduce power consumption
Meanwhile, the presentation also presented Applied Materials' solution for combining heterogeneous chips that can significantly reduce power consumption.
Park Heung-rak, Head of Package Technology, who was in charge of the presentation, introduced materials, technologies, and new products that help integrate chiplets into the latest 2.5D and 3D packages using hybrid bonding and TSV techniques.
Park Heung-rak, CEO, said that with the current technology, an era will come in which operating two supercomputers will consume as much electricity as one nuclear power plant. He added that to solve this problem, semiconductor power consumption must be reduced. He also said that if semiconductor companies combine chiplets of various functions, technology nodes, and sizes into the latest package through heterogeneous integration (Hi) to operate them as a single product, the required power consumption can be drastically reduced.
To achieve this, Applied is using chip-to-wafer and wafer-to-wafer hybrid bonding to directly connect chips using copper-to-copper bonds, helping the bonded devices perform like a single device, improving PPACt (power, performance, size, cost and time to market).
Equipment that implements this include the Insepra SiCN deposition system and the Catalyst CMP solution.
Applied also supplies the Producer InVia 2, Endura Ventura 2 PVD systems, and Producer Avila PECVD systems to implement TSVs, which are vertical interconnections that etch trenches into silicon and then precisely connect stacked chips with insulating films and metal wiring.