Board Design and Simulation Using EEsof ADS SIPro/PIPro

Pre-validation for high-speed channel models such as USB Type-C is as important as post-validation. By considering design margins for high-speed channels during the Pre-Layout stage and implementing accurate modeling through simulation, Signal Integrity and Power Integrity issues can be prevented in advance. Additionally, if simulation tools are used during the Post-Layout stage, problems can be resolved more quickly. In this session, we will introduce how to perform simulation more easily and intuitively through the newly updated SIPro and PIPro in EEsof ADS.