Applied Materials announced that it is already supplying technology to semiconductor manufacturers to apply ruthenium (Ru), which has been widely discussed in the research stage, to advanced semiconductor processes of 2nm or less by reducing power consumption by 25% and reducing gap resistance during mass production, raising expectations that innovation in ultra-fine semiconductor manufacturing processes will accelerate in the future.

Applied Materials announced at a press conference on the 14th a materials engineering innovation that increases performance per watt of computer systems by enabling copper wiring scaling below the 2 nanometer (nm) logic node.

At the symposium that day, Eun-ki Lee, head of thin film technology, was in charge of the presentation.

According to CEO Lee Eun-ki, as devices get smaller, the wiring line resistance increases, which reduces speed, and the electrostatic capacity increases, which leads to greater power consumption. However, in the AI era, computing with even higher energy efficiency is required, and chip wiring and stacking are very important in terms of performance and power consumption.

To improve this, Applied has improved the existing cobalt dielectric with a material using cobalt (Co) and ruthenium (Ru), reducing the wiring from 30 angstroms to 20 angstroms, reducing the space by half, and increasing the copper capacity by 30%, improving power efficiency.He said it was good.

In particular, when reducing the thickness of cobalt, voids can be created, but to prevent voids from being created, the Endura Cooper Barrier Seed IMS system was implemented, in which chambers are connected as one in a vacuum state. Rather than simply using ruthenium, the process technology was used to reduce electrical wiring resistance by up to 25%, thereby improving chip performance and power consumption.

Additionally, Endura announced that its Cooper Barrier Seed IMS has been adopted by all leading logic semiconductor manufacturers and has started shipping to customers at 3nm.

Along with this, low-K dielectric technology has also been improved. As the dielectric constant (K) of the insulator between the wires decreases, the physical properties deteriorate. To overcome this, Applied Materials has lowered the dielectric constant and increased the physical properties with its 'black diamond' material technology, reducing damage during packaging.

It is known that this maximizes power efficiency and enables scaling below 2 nanometers, implementing mechanical rigidity that has become very important for semiconductor manufacturers and system suppliers to increase the dimension of 3D logic and memory stacking, and is being adopted by many logic and DRAM companies.

Eun-ki Lee, General Manager of Thin Film, said, “Through this innovation in materials engineering, we have contributed to semiconductor makers fundamentally increasing yield and reliability,” and “We will strive to provide cutting-edge technology in advanced interconnect wiring processes of 2nm or less.”