Development of 176-layer 512Gb TLC memory has been completed, and samples have begun to be provided.
Reduced cell height and increased bit productivity by more than 35%
Plans to launch products for each application from mid-2021


SK Hynix has also joined the NAND flash stacking competition that Micron has ignited.

SK Hynix announced on the 7th that it has developed a 176-layer 512Gb (gigabit) TLC (Triple Level Cell) 4D NAND flash memory. SK Hynix provided samples of this product to a controller manufacturer last month to develop solutions.

SK Hynix is introducing 4D products to the market that combine △CTF (Charge Trap Flash) technology, which reduces cell-to-cell interference by storing charges in insulators, and △PUC (Peri Under Cell) technology, which increases production efficiency by placing peripheral circuits at the bottom of the cell circuits, starting with 96-layer NAND flash.

SK Hynix officials explained that the 176-layer NAND developed this time is a third-generation 4D product, and that it has differentiated cost competitiveness with bit productivity improved by more than 35% compared to the previous generation.

By applying a new two-part cell area selection technology, the reading speed from the cell has been increased by 20% compared to the previous generation. We also applied technology that can increase speed without increasing the number of processes, achieving a data transmission speed of 1.6 Gbps, a 33% improvement.

SK Hynix plans to expand its market by application by sequentially launching consumer SSDs and enterprise SSDs, starting with a mobile solution product with a maximum read speed improved by approximately 70% and a maximum write speed improved by approximately 35% in mid-2021.

As the number of layers in NAND flash increases, cell distribution deterioration occurs due to a decrease in current inside the cell, interlayer distortion, and stack misalignment.

An SK Hynix official explained that this was overcome through ▲cell layer height reduction technology ▲layer-by-layer variation timing control technology ▲precision alignment correction technology.

In addition, the company plans to continuously develop 1Tb (terabit) products with double the capacity based on 176-layer 4D NAND to enhance the competitiveness of its NAND flash business.

Micron announced in November that it had begun mass-producing 176-layer NAND flash memory to customers. Industry sources believe the product is comprised of two stacked 88-layer NAND flash chips, rather than a 176-layer stack, but Micron denies this.

Meanwhile, market research firm Omdia predicted that the NAND flash market, which was 431.8 billion GB in 2020, will expand to 1,366.2 billion GB in 2024, growing at an average annual rate of 33.4%.