Integrys Announces New Post-CMP Cleaning Solution for Semiconductor Manufacturing
Published2016.01.28 16:23
Designed with a process of 10 nm or less, providing high cleaning power
Integris, a semiconductor materials and components company, held a press conference at the Grand Intercontinental Hotel in Samseong-dong, Seoul, and announced a Post-CMP (Chemical Mechanical Planarization) cleaning solution on the 26th.
Post-CMP refers to a semiconductor manufacturing process that involves flattening thin films formed unnecessarily on the wafer surface to remove contaminants, such as nanoparticles generated during the process, thereby minimizing potential wafer defects and manufacturing high-performance semiconductor chips.
With the introduction of various new materials into advanced semiconductor product lines and changes beginning to occur in the slurry composition used in the CMP process, there are limitations to cleaning with existing cleaning solution products, leading to an increasing demand for new cleaning solutions.
In response to these demands, Integris launched the 'PlanarClean' AG product family. Chang-Hwan Lim, Country Manager for Korea (pictured) , moderated the press conference for the announcement. He explained, “'PlanarClean' is designed for a process of less than 10 nm (nano) and provides high cleaning power while protecting copper, cobalt, and tungsten exposed to chemicals.” In addition, stating that it has improved device yield through zero-level corrosion/defects in metal films and improved queue time performance, it also emphasized, “As efforts to comply with customer manufacturing environment safety regulations increase over time, Integris meets safety requirements for advanced processes.”
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