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Lattice Semiconductor Expands Programmable ASSP Solution Supporting Video Bridging Function
Reduces power consumption by decreasing logic resource usage through existing CrossLink IP optimization.
It will be a way to develop high-performance, low-power, and compact bridging solutions.
Lattice Semiconductor announced that it is expanding its CrossLink™ programmable ASSP (pASSP) solution to support new video bridging capabilities.
Lattice stated that this solution consists of three CrossLink IPs (intellectual properties) and two CrossLink demo platforms, each capable of demonstrating interface bridging from MIPI® DSI to LVDS and from CMOS to MIPI CSI-2, and that power consumption has also been lowered by reducing logic resource usage through the optimization of existing CrossLink IPs in relation to solution expansion.

Lattice announced that by leveraging new IP, development platforms, and additional resources, it has expanded solutions that combine the flexibility and fast time-to-market performance of FPGAs with the power and function optimization characteristics of ASSPs, and is now able to supply these solutions for a wide range of bridging applications.
CH, responsible for marketing in Lattice Semiconductor's Mobile and Consumer Business Unit “The new CrossLink IP and solutions will enable customers to apply the latest mobile interface technology to camera and display products, reducing overall system costs, power consumption, and size while accelerating the design cycle of their next-generation products,” said Senior Director Chee. “As the first developer of programmable bridging devices and the world’s fastest MIPI D-PHY bridging devices, Lattice is committed to providing low-cost bridging solutions with the best bandwidth, lowest power consumption, and smallest footprint.”
It will be a way to develop high-performance, low-power, and compact bridging solutions.
Lattice Semiconductor announced that it is expanding its CrossLink™ programmable ASSP (pASSP) solution to support new video bridging capabilities.
Lattice stated that this solution consists of three CrossLink IPs (intellectual properties) and two CrossLink demo platforms, each capable of demonstrating interface bridging from MIPI® DSI to LVDS and from CMOS to MIPI CSI-2, and that power consumption has also been lowered by reducing logic resource usage through the optimization of existing CrossLink IPs in relation to solution expansion.
Lattice announced that by leveraging new IP, development platforms, and additional resources, it has expanded solutions that combine the flexibility and fast time-to-market performance of FPGAs with the power and function optimization characteristics of ASSPs, and is now able to supply these solutions for a wide range of bridging applications.
CH, responsible for marketing in Lattice Semiconductor's Mobile and Consumer Business Unit “The new CrossLink IP and solutions will enable customers to apply the latest mobile interface technology to camera and display products, reducing overall system costs, power consumption, and size while accelerating the design cycle of their next-generation products,” said Senior Director Chee. “As the first developer of programmable bridging devices and the world’s fastest MIPI D-PHY bridging devices, Lattice is committed to providing low-cost bridging solutions with the best bandwidth, lowest power consumption, and smallest footprint.”
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