Technology that reduces manufacturing test costs and improves system quality

Mentor, a Siemens business, announced the availability of VersaPoint test point technology in its Tessent ScanPro and Tessent LogicBIST products, which maintain ISO 26262 qualification, the automotive semiconductor safety standard.

VersaPoint test point technology reduces manufacturing test costs and improves the quality of in-system test. Both requirements are essential for achieving reliable ICs in automotive and other industries. Mentor also announced that Renesas Electronics has adopted VersaPoint technology in its automotive ICs to meet safety-critical test requirements and achieve ASIL (Automotive Safety Integrity Level) C and D certification.

Digital circuits in automotive ICs are typically tested using a hybrid solution of on-chip compression/ATPG technology and logic-built-in self-test (LBIST) technology, which achieves very high fault coverage in manufacturing test and enables in-system self-test and power-on self-test (POST).

Test points are dedicated design structures used to improve test results. Traditional LBIST test points provide improved results by addressing the "random pattern resistance" problem within the IC. Mentor's more recent test points specifically developed for on-chip compression/ATPG reduce the number of ATPG patterns by two to four times compared to what can be achieved with on-chip compression alone. Tessent VersaPoint test point technology combines and enhances these technologies.

“Renesas is leveraging test points to help meet stringent IC test requirements to deliver industry-leading automotive ICs,” said Hisanori Ito, vice president of the Automotive SoC Business Unit at Renesas Electronics. “With Tessent VersaPoint test point technology, separate solutions are no longer needed for different IC types. This results in improved quality and reduced costs for both manufacturing and in-system test. The streamlined DFT implementation flow also shortens development cycles and time-to-market.”

Adopting Tessent VersaPoint technology increases LBIST test coverage compared to conventional LBIST test points, while reducing the number of ATPG patterns compared to using on-chip compression/ATPG test points. This technology is designed to help test engineers using Tessent Hybrid ATPG/LBIST achieve cost savings and improved test quality, particularly in ICs targeting automotive applications.

“Our customers are constantly looking for ways to reduce the cost of test as design sizes increase and quality requirements become more stringent,” said Brady Benware, marketing director for Mentor’s Tessent product line. “At the same time, high-reliability applications are driving the need for efficient in-system test. “With the availability of VersaPoint test point technology, customers have a more effective way to meet both manufacturing test requirements and in-system test requirements,” he said.