Hong Kong, September 6, 2012 — Altera (NASDAQ: ALTR) announced major innovative technologies planned for its next-generation 20nm products. Expected to further accelerate silicon convergence, Altera can now provide the ultimate system integration platform that combines FPGA hardware programmability and the software flexibility of digital signal processors and microprocessors, while also delivering the efficiency of application-specific hard IP (intellectual property). The architectural, software, and process innovations that Altera aims to apply at 20nm will enable the development of an enhanced mixed-system fabric that delivers a new dimension of performance, bandwidth, integration, and power efficiency.

The innovations in Altera's 20nm mixed-system fabric include 40Gbps transceiver technology, next-generation variable precision digital signal processing (DSP) block architecture delivering over 5 TFLOPs of IEEE 754 floating-point performance, and heterogeneous 3D ICs integrating FPGAs with custom HardCopy® ASICs or other diverse technologies (including memory, third-party ASICs, and optical interfaces via innovative high-speed interconnects). Altera is the only company in the industry capable of integrating FPGAs and ASICs into a single device.
The 20nm mixed-system fabric also delivers continuous innovation in power management through adaptive voltage scaling, Programmable Power Technology, and optimized process technology. As a result, Altera can reduce device power consumption by up to 60 percent compared to previous-generation devices.

For designers developing heterogeneous 20nm systems, Altera supports a comprehensive high-level design environment that includes system-level design tools (Qsys), C-based design tools (OpenCL™), and DSP development software (DSP Builder). Altera continues to focus on design engineer productivity and is enhancing development tools to achieve the industry's fastest compile times at 20nm.
Bradley Howe, Senior Vice President of Research and Development at Altera, stated: "Designers of next-generation communications, networking, broadcast, and computing applications increasingly face the challenge of meeting demands for higher bandwidth, higher performance, and lower power. The innovations we are introducing at 20nm enable the development of a highly efficient and flexible mixed-system fabric that delivers the highest-performance dedicated circuits using advanced 20nm FPGA process technology. As a result, we can provide devices that support the industry's lowest power consumption with the highest level of IC integration, performance, and bandwidth."
Altera's next-generation devices utilize TSMC's 20nm process technology and will deliver the industry's highest level of system integration, including hard ARM® processor subsystems. The 20nm SoC FPGA enables software portability from 28nm to 20nm and delivers a 50 percent improvement in processor subsystem performance.
Key innovations at 20nm are as follows:

• High Serial Bandwidth: 40Gbps Chip-to-Chip and 28Gbps Backplane Transceivers
Innovations in transceiver technology at 20nm provide the industry's highest serial bandwidth, enabling transition to 100G backplanes and 400G systems. The 20nm device includes both 28Gbps transceivers to drive CEI-25G-LR Ethernet 4x25G backplanes and 40Gbps transceivers designed to interface with chip-to-chip or chip-to-optical modules. The transceiver technology innovations Altera is applying at 20nm provide the foundation to develop CEI-56G-compliant transceivers that deliver connectivity enabling next-generation 400G optical networks, 400G line cards, and beyond.

• Heterogeneous 3D IC with High-Speed Chip-to-Chip Interfaces
At 20nm, Altera introduces innovative high-speed chip-to-chip interfaces that can integrate multiple dies into 3D packages. By introducing this innovative interface, Altera can deliver customer-tailored heterogeneous 3D systems combining FPGAs with custom HardCopy ASICs or diverse other technologies (such as memory, third-party ASICs, and optical interfaces). By integrating FPGAs with HardCopy ASICs or third-party ASICs, Altera can deliver a single-device solution achieving over 10 times higher system integration levels compared to 28nm products. Altera's heterogeneous 3D ICs are manufactured using TSMC's CoWoS (chip-on-wafer-on-substrate) process. These devices enable developers to significantly enhance system integration, system performance, and product differentiation while simultaneously reducing system power, board space, and cost.

• Superior DSP Performance and TFLOPs/Watt
With 20nm devices, Altera sets a new benchmark for TFLOPs. Enhancements with next-generation variable precision DSP blocks enable achievement of over 5 TFLOPs of IEEE 754 floating-point performance. At this performance level, Altera's 20nm devices deliver over 5 times superior TFLOPs per watt compared to competing FPGAs. Altera's 20nm devices provide the ultimate heterogeneous computing platform by combining the productivity advantages of OpenCL C-based design flows, ARM hard processor subsystems, and superior silicon efficiency of TFLOPs per watt.

Altera is collaborating with customers to develop 20nm products and is discussing product roadmaps. More detailed information on Altera's 20nm products can be found at www.altera.com/20nm. A white paper on Altera's 20nm innovations can be found at www.altera.com/20nm_innovations. For new information on Altera's 20nm products or the benefits of using Altera solutions in next-generation systems, please contact Altera's sales representative (Axios(Uniquest) 031-776-9888).