Verigy Launches Semiconductor Industry's First Scalable Tester, V93000 Smart Scale, to Reduce Next-Generation IC Test Costs

A new generation of “smart” test systems and digital channel cards designed for advanced 28nm devices and 3D architectures

CUPERTINO, Calif.–July 25, 2011–Verigy, a division of Advantest Group (TSE: 6857, NYSE: ATE), today announced the introduction of the industry’s first scalable, cost-effective tester family for advanced semiconductor design, including 3D device architectures and IC designs through the 28nm technology node and beyond.

Fully compatible with Verigy’s production-proven V93000 platform, the Smart Scale series is an innovative family of “smart” testers with advanced per-pin capabilities. “Smart testing” means that each pin operates in its own clock domain, matching the precise data throughput requirements of the device under test, providing complete test capability. It enables system-level stress testing at the ATE level, along with other key features such as power supply modulation, jitter injection, and protocol communications, improving fault model coverage.

“With our innovative V93000 Smart Scale Generation test system and pin card, Verigy is pioneering ‘smarter’ test technologies that provide customers with tailored solutions to reduce their cost of test,” said Hans-Juergen Wagner, Executive Vice President, SOC Test at Verigy (part of the Advantest Group).
The four Smart Scale tester classes, labeled A, C, S, and L, each have different test head sizes to provide the most efficient solution for each user's specific application.

“Because each tester class is fully compatible with the others, users can quickly and easily migrate their devices from one Smart Scale class to another as IC production volumes change throughout the life cycle of their semiconductor devices,” Wagner added. “No other automated test equipment vendor offers this capability.”

Verigy’s unique approach enables parallel test and the industry’s first wafer sorting stage to deliver full-performance test solutions – a critical performance requirement for testing advanced system-on-chip (SOC) devices, system-in-package (SiP) devices and wafer-level chip-scale packages (WLCSPs).

Along with the V93000 Smart Scale tester, Verigy is also launching three new digital channel cards.
The new Pin Scale 1600 digital cards and Pin Scale 1600-ME (memory emulation) cards provide the industry’s broadest range of capabilities per digital channel. In addition to delivering data throughput ranging from DC to 1.6 Gbit/s—twice as fast as the previous generation—these cards also offer densities that are two to four times higher than previous pin cards. In a compact package with unprecedented density, the new PS1600 cards include Verigy’s Clock-Domain-per-pin (configurable clock domains per pin), Protocol-Engine-per-pin (system-like test environment per pin), PRBS-per-pin (hardware PRBS drive/receive per pin), and SmartLoop test (Verigy’s new Loop-Back test) for symmetrical high-speed interfaces.

Additionally, these products are capable of precise DC testing, high efficiency in multi-site situations, and asynchronous testing for concurrent testing.

Verigy's new PS9G card enables at-speed-test. This card is expected to see a lot of use, as it can implement various functions per pin of PS1600 and can increase the data rate up to 8Gbps. This PS9G card can be used as bi-directional for all pins, and also supports single-ended mode and differential mode. It can also perform both pattern and patternless tests, so it can meet a wide range of test requirements, from parallel I/O test for design verification in mass production to serial physical layer (PHY) test.