Xilinx Korea (Regional Director An Heung-shik) December 11, 2013 – Xilinx announced that it has achieved an industry record with a 4.4M logic cell device, doubling the capacity of its industry-leading high-capacity Virtex®-7 2000T device. With this achievement, Xilinx has maintained leadership in high-end FPGAs for two consecutive generations while providing customers with additional nodes advantage. The Virtex® UltraScale™ VU440 3D IC, the most advanced device in Xilinx's All Programmable UltraScale™ portfolio, has extended industry leadership by expanding density from 2x at 28nm to 4x at 20nm, representing the highest capacity offered by any programmable device currently available. Utilizing advanced 3D IC technology, the VU440 device at 20nm provides substantially greater advantages compared to competitors' disclosed 14/16nm roadmaps.

The Virtex UltraScale VU440 device sets new industry benchmarks, delivering approximately 50M ASIC gate equivalents for next-generation production prototype applications. Additionally, the 20nm Virtex UltraScale device provides the highest system performance and bandwidth required for single-chip implementation of 400G MuxSAR, 400G transponder, and 400G MAC-to-Interlaken bridge applications.

John Koeter, Vice President of IP System Marketing at Synopsys, stated, "Synopsys has used six generations of Xilinx devices in its fully integrated HAPS® FPGA-based hardware and software prototyping system. Combined with the capabilities of Xilinx Virtex UltraScale VU440, the unique system capabilities of HAPS will increase overall system performance and capacity, thereby enhancing productivity required for fast software development, hardware/software integration, and SoC system verification."

The Virtex UltraScale product family adds re-programmability functionality, providing customers with a new dimension of performance, system throughput, and bandwidth. The Virtex UltraScale VU440 device adopts ASIC-class architecture to further enhance scalability, achieving utilization rates up to 90% through next-generation routing, ASIC-like clocking, power management, elimination of interconnect bottlenecks, and critical path optimization. Beyond key architectural block improvements such as expanded multipliers, high-speed memory cascading, 33G performance transceivers, and the addition of industry-leading integrated 100Gb/s Ethernet MAC and 150Gb/s Interlaken IP cores, the device delivers hundreds of gigabits per second of system performance through smart processing at full line rate.

Spencer Sauders, Hardware Acceleration Director at ARM, stated, "ARM has utilized previous-generation Virtex FPGAs for IP verification. The innovations of the UltraScale architecture combined with Vivado have enabled higher utilization and performance than ever before. The extensive gate capacity, superior serial bandwidth, and impressive I/O pin count of Virtex UltraScale make it ideal for next-generation IP development."

The key to this device's industry-leading bandwidth and capacity lies in second-generation SSI (Stacked Silicon Interconnect) technology. Based on TSMC's CoWoS manufacturing technology, this generation of SSI technology features 5x greater inter-die bandwidth and an integrated clocking architecture at slice boundaries, enabling a virtual monolithic design experience. Xilinx's SSI technology enables device development with 2-4x greater capacity than competing products while consistently advancing ahead of Moore's Law. First introduced in 2011 with the Virtex-7 2000T device, SSI technology was built with 6.8 billion transistors and enabled the use of an unprecedented 2M logic cells, equivalent to 20M ASIC gates.

Xilinx UltraScale devices represent the industry's only ASIC-class programmable architecture extended from monolithic designs through 3D IC and 20nm planar technology via 16nm FinFET technology, propagating ASIC-class strengths. Through the combination with TSMC's latest technology, co-optimization with Vivado ASIC-strength design suite, and recently introduced UltraFast™ design methodology, Xilinx achieves 1.5-2x improved system-level performance and integration while demonstrating technology up to 2 years ahead of the curve.