Agilent Korea (CEO and President Yoon Deok-kwon) has launched a new, scalable, integrated M8000 Series BER (Bit Error Rate) test solution for physical layer characterization and verification, as well as receiver conformance testing used in multi-gigabit digital designs. Supporting a wide range of data transfer rates and standards, the new M8000 Series BER test solution is an accurate and reliable product that can enhance insights into performance testing of high-speed digital devices for computers, consumer electronics, servers, mobile computers, and data-center products.

R&D and verification teams face several challenges when characterizing next-generation designs. The faster data transfer speeds of the latest next-generation digital computer buses, such as PCI Express® 4 (bit speed of 16 GT/s) and USB 3.1 (bit speed of 10 Gb/s), present new challenges regarding signal integrity. And the new 128/130-bit and 128/132-bit coding formats complicate error detection and loopback pattern generation.
In addition, as mobile computing devices become widely adopted, research and development and test engineers must measure various implementations of MIPI™ ports, including new data formats, termination models, multiple lanes, and built-in error counting.

With the rapid increase in data center traffic, server and storage designs must support much higher bandwidths on backplanes and network ports. Data rates of 25-Gb/s or higher on multiple lanes of PC boards, cables, or optical interconnects are required by most modern industry standards, such as 100GbE, CEI, and Fibre Channel. Testing of devices such as 25-Gb/s receiver ports requires new test capabilities to characterize device tolerances, such as interference, channel loss, and crosstalk.

“The new M8000 series BER test solution helps R&D and test engineers master the challenges of next-generation receiver testing,” said Juergen Beck, General Manager and Vice President of Agilent’s Digital and Photonic Test Division. “With outstanding integration and scalability, the M8000 series will serve as the foundation for engineers to accelerate the accurate receiver characterization of high-speed digital designs.”

The first model of the new M8000 series is the J-BERT M8020A high-performance BERT. This model enables rapid and accurate receiver characterization of single and multi-lane devices operating at data rates of 16 Gb/s and 32 Gb/s. The M8020A accelerates design insights with the following specifications.

1. Simplifies receiver test setup by providing the highest level of integration. It provides built-in jitter injection, 8-tap de-emphasis, interference signal source, reference clock multiplication, clock recovery, and equalization.

2. Automated in-situ calibration ensures accurate and repeatable measurements.

3. The M8020A can act as a link partner for the device under test and supports interactive link training for PCIe devices, thus reducing the effort required to put the device into loopback test mode.

The J-BERT M8020A high-performance BERT has a scalable architecture for future test requirements. It supports 1 to 4 BERT channels, supports data rates up to 8.5 Gb/s and 16 Gb/s, and can be scaled up to 32 GB/s.

The new J-BERT M8020A is built on AXIe, the industry standard for high-performance modular test equipment. The M8020A can be controlled via a user interface through USB, and all options are upgradeable.