An ultra-small semiconductor device has been realized that far surpasses the level of semiconductor technology predicted by the Institute of Electrical and Electronics Engineers (IEEE) by 2037.

The research team led by Director Moon-ho Cho (Professor of Materials Science and Engineering at POSTECH) of the Van der Waals Quantum Matter Research Group at the Institute for Basic Science (IBS, President Do-young Noh) announced on the 3rd that they had implemented a new structure of ultra-small semiconductor devices by applying a one-dimensional metallic material with a width as small as an atom to two-dimensional semiconductor technology.

This is expected to be a breakthrough in next-generation semiconductor technology and a fundamental technology for the development of various low-power, high-performance electronic devices.

Recently, as the miniaturization of semiconductor devices has reached its physical limits, research utilizing two-dimensional semiconductors has been attracting attention as a global basic and applied research.

Two-dimensional semiconductor materials exhibit excellent semiconductor properties even at extremely thin thicknesses, making them a key material for the next-generation semiconductor industry. However, no process technology exists to reduce electron movement within two-dimensional semiconductors to the extreme, below a few nanometers, making their expansion into integrated circuits nearly impossible.

Integration density is a measure of how densely components are packed into a semiconductor chip. As integration increases, the process cost decreases and more data can be processed quickly, so the size of the components that make up the chip must become smaller.

Existing semiconductor processes determine the degree of integration through a lithography process that draws a desired pattern on the surface of a silicon chip with light.

Although it is possible to draw fine details at the wavelength of light, it is technically nearly impossible to reduce them to the extreme size of an atom, so a new technology was needed to overcome the limitations of lithography in next-generation semiconductor processes.

To solve this technical challenge, the IBS research team was inspired by the fact that the mirror twin boundary of molybdenum disulfide (MoS2), a two-dimensional semiconductor, is a one-dimensional metal with a width of only 0.4 nm, and utilized it as a gate electrode for semiconductor devices.

With this, the research team has successfully implemented a one-dimensional metal-based semiconductor device with an atomic-scale gate length without lithography, and has also succeeded in implementing a logic circuit based on an ultra-small semiconductor device.

This semiconductor device The simple structure and narrow gate length minimize unwanted capacitance present in the circuits of existing electronic devices, significantly improving circuit performance.

The research team's achievements also have significant significance in terms of basic material science.

By using the van der Waals epitaxy method, the boundary between molybdenum disulfide crystals was aligned without allowing even an atomic-level error, realizing a perfectly straight one-dimensional metallic mirror twin boundary.

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