Anritsu Corporation (Representative Director Hirokazu Hashimoto) has announced upgraded high-load jitter tolerance test functionality for the MP1800A Signal Quality Analyzer series to support evaluation of high-speed serial connected devices including 100GbE, OIF-CEI 28G, InfiniBand EDR, and 32G optical channel.
The MP1800A is a plug-in module-type BERT (Bit Error Rate Test) that, when equipped with a jitter generation module, supports generation of various jitter modulation components including SJ, RJ, BUJ, SSC, and secondary-order tone SJ.
The newly announced functionality generates broad amplitude SJ of up to 2000UI. At a high jitter modulation frequency of 250MHz, SJ generation supports up to 1UI. Additionally, the newly announced equalizer compensates for degraded signal output eye opening of the DUT (Device Under Test) due to transmission path loss and supports BER measurement.
These new functions enable configuration of a measurement system for jitter tolerance testing of devices such as SERDES with sufficiently high accuracy and margin, and support 100GbE, OIF-CEI 28G, InfiniBand EDR, and 32G optical channel.
The MP1800A jitter modulation source module has extremely low intrinsic jitter of only 275fs rsm (nominal) at zero jitter setting, supporting accurate measurement even at very low jitter amplitudes. Equipped with low intrinsic jitter PPG (Pulse Pattern Generator), 4TAP emphasis, PAM converter, high-precision ED (Error Detector), and automatic jitter tolerance measurement software, the MP1800A is an ideal total solution for jitter tolerance measurement.
The driving factors for high-speed serial device development are the explosive increase in data traffic and the rapid processing speeds of servers and network equipment, as well as fast communication speeds between equipment. Anritsu expects these expanded jitter tolerance measurement capabilities to facilitate the deployment of faster servers and network equipment.
[Development Background]
As cloud computing services grow rapidly, data center traffic volumes are expanding explosively. As a result, new high-speed communication protocols such as 100GbE (100GBASE-SR4, KR4, CR4), InfiniBand EDR, and 32GFC are being evaluated to support increased processing speeds of servers and network equipment and fast communication speeds between equipment. Jitter tolerance is a key indicator in the receiver characteristics of PHY devices such as SERDES used in these high-speed serial communications. As jitter tolerance requirements increase with increased bit rates, there is an urgent need for testing that can accurately measure receiver jitter tolerance with sufficient margin. Additionally, the output signal of the DUT is degraded by transmission path loss, reducing eye opening size, and in some cases blocking reception by the measurement equipment's ED.
Anritsu's MP1800A Signal Quality Analyzer series is already widely used as a jitter tolerance measurement solution in high-speed devices of up to 32Gbit/s, and with the release of upgraded functionality, it can now generate broad amplitude SJ of up to 2000UI and 1UI at a high jitter modulation frequency of 250MHz. Anritsu also simultaneously released equalizer functionality to compensate for eye opening in DUT signal output and BER measurement support functionality together with high-precision ED.

[Product Overview]
The MP1800A Signal Quality Analyzer series is a plug-in module-type BERT that can simultaneously install PPG, ED, synthesizer, and jitter generation modules.
With the release of upgraded functionality, it can now generate broad amplitude SJ of up to 2000UI and up to 1UI at a high jitter modulation frequency of 250MHz, with simultaneous generation of RJ, BUJ, SSC, and secondary-order tone SJ also possible.
It can be used to configure a high-precision measurement system with sufficient margin for jitter tolerance measurement of PHY devices such as SERDES, and supports 100GbE, OIF-CEI 28G, InfiniBand EDR, and 32G optical channel.
Equipped with low intrinsic jitter PPG, 4TAP emphasis, PAM converter, high-precision ED, equalizer functionality for eye opening compensation, and automatic jitter tolerance measurement software, the MP1800A is an ideal total solution for jitter tolerance measurement.
The newly released functionality is activated in MP1800A software version 7.9 or later and is used together with the MU181500B jitter modulation source equipment.

[Product Features]
Simultaneous Generation of SJ, RJ, BUJ, SSC, and Secondary-Order Tone SJ
Support for simultaneous generation of SJ, RJ, BUJ, SSC, and secondary-order tone SJ at high bit rates of 32Gbit/s, supporting standards such as OIF-CEI 28G, 100GbE, InfiniBand EDR, and 32G FC.
High-Amplitude SJ Generation
Generation of broad amplitude SJ of up to 2000UI. At a high jitter modulation frequency of 250MHz, 1UI provides sufficient margin for measuring device jitter tolerance limits.
Low Intrinsic Jitter
A jitter modulation source with extremely low intrinsic jitter of only 275fs rsm (nominal) at zero jitter setting supports accurate measurement even at very low jitter amplitudes.
Eye Opening Equalizer Compensation
The eye opening of DUT output signal tends to close due to high bit rates and transmission path loss, so in some cases an equalizer for eye opening is required in the measurement receiver. By inserting a passive linear equalizer upstream of the ED, transmission path loss can be compensated to restore eye opening. When used with high-sensitivity ED, jitter tolerance testing of PHY devices with narrow openings is possible.
High-Sensitivity ED
Anritsu's independently developed broadband high-precision receiver chip provides high accuracy of 10mV (typical, single-ended, eye height).
Built-in Clock Recovery
Built-in clock recovery functionality supports TRx asynchronous SERDES jitter tolerance testing.
[Target Markets and Applications]
■ Target Market: Advanced server, storage, communications equipment, and component manufacturers
■ Applications: Research and development of high-speed serial transmission devices