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A new generation of programmable logic devices increases design productivity.

Altera Corporation announced the availability of its new ^Quartus® Prime design software . Altera’s new software environment builds on the company’s proven, user-friendly Quartus II software and introduces the Spectra-Q™ engine as a new productivity-oriented tool.

Quartus Prime design software is designed to enhance the design process for FPGAs and SoC FPGAs by reducing design iterations, achieving industry-leading compile times, and accelerating silicon performance.

“Our software tools are known throughout the industry for delivering outstanding levels of performance and productivity,” said Alex Grbic, senior director of software and IP marketing at Altera. “Quartus Prime design software builds on decades of software innovation to further solidify Altera’s leadership by enabling our customers to achieve new levels of performance and productivity in programmable logic devices,” he said.




Quartus Prime design software users will have the same easy-to-use front-end user interface as previous software releases, but with the addition of the Spectra-Q engine as a back-end. The engine also uses a hierarchical database to maintain placement and routing of IP blocks, ensuring a stable design, eliminating unnecessary timing closure work, and reducing compile times.

Speed ratings have been improved over previous software versions by using highly scalable Hybrid Placer and Global Router algorithms. In addition, the Rapid Recompile feature has been used to achieve compilation times up to 4x faster.

Finally, it supports extended hardware description languages including System Verilog-2005 and VHDL-2008. Additional information about Quartus Prime design software version 15.1 can be found at www.altera.com/whatsnew .