Silicon Labs announced the launch of a jitter-attenuating clock product family that simplifies the design of 100G/400G coherent optical line cards and modules.

Silicon Labs' new Si534xH coherent optical clock replaces discrete timing solutions that rely on expensive and large-footprint VCSO (voltage-controlled SAW oscillator), providing low-jitter reference timing suitable for data converters.

Unlike VCSO which supports a single fixed frequency, the new Si534xH clock operates across a wide frequency range and supports frequencies up to 2.7 GHz without requiring changes to the BOM (bill-of-material).



The Si5344H and Si5342H clocks demonstrate frequency flexibility and jitter performance of 50 fs RMS. These devices simplify component sourcing and replace VCSO, which requires multiple customization processes and lengthy lead times, with a clock IC solution available in just 2 weeks.

The Si534xH product family, equipped with jitter-attenuating PLL, high-frequency output drivers, fractional frequency synthesis, and DCO (digitally controlled oscillator) technology, provides all clocking functions required in coherent optical transceiver applications while achieving 40% smaller footprint and 40% lower power consumption compared to competing products.

Silicon Labs' Si534xH clock is designed to meet the timing requirements of 100G/400G coherent optical communications. In addition to supporting ultra-high-frequency synthesis capability that supplies clocks to optical transceiver data converters, it provides a single-chip solution integrating Silicon Labs' DSPLL jitter-attenuating technology and MultiSynth low-jitter fractional frequency synthesis technology.

All 100G/400G transmitter or receiver clocks can be generated by a single device, eliminating the need for many discrete components and minimizing BOM cost and complexity.

James Wilson, Senior Marketing Director overseeing Silicon Labs' timing products, stated: "Silicon Labs' Si534xH clock delivers the high-frequency clock synthesis, jitter attenuation, and stringent phase noise performance required in coherent optical communications applications with a smaller footprint and lower power consumption compared to traditional VCSO-based solutions."

Silicon Labs supports coherent clock development with the user-friendly software tool ClockBuilder Pro. ClockBuilder Pro simplifies clock tree design, device configuration, and detailed performance evaluation. The tool can be used in standalone mode to generate device configuration files or directly control Si534xH devices on evaluation boards. ClockBuilder Pro can also be used to generate factory-customized versions of Silicon Labs' jitter-attenuating and clock generator products individually tailored to meet each customer's unique timing requirements.