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CCIX Consortium Adjusts CCIX Specification to Address Data Center Connectivity Needs
Triple the size of member companies and disclose detailed specifications
Addition of diverse new members ranging from silicon suppliers to ecosystem partners
The CCIX (Cache Coherent Interconnect for Accelerators) consortium announced that its membership has tripled due to the addition of new members and disclosed the CCIX specifications to its members.
Founding members AMD, ARM, Huawei, IBM, Mellanox Technologies, Qualcomm Technologies, and Xilinx announced that they welcome various ecosystem partners ranging from silicon suppliers to design, verification, software, and systems.
The new members are Amphenol Corp., Arteris Inc., Avery Design Systems, Atos, Cadence Design Systems, Inc., Cavium, Inc., IDT (Integrated Device Technology, Inc.), Keysight Technologies, Inc., Micron Technology, Inc., NetSpeed Systems, Red Hat Inc., Synopsys, Inc., Teledyne LeCroy, Texas Instruments, and TSMC.

CCIX is a processor based on multiple instruction set architectures that acceleratesIt enables extending cache coherency through iterators, interconnects, and I/O.
High-performance accelerators are core components of processor systems, and system designers can use CCIX technology to freely select appropriately combined heterogeneous components from various vendors to satisfy unique system requirements.
Through close collaboration, member companies adjusted the CCIX specification to address the need for data center connectivity. By leveraging and reinforcing the current general ecosystem, they enabled higher bandwidth, lower latency, and complete consistency.
Furthermore, the CCIX Consortium plans to increase the speed of the PCI Express architecture to over 25 Gbps to use it as the first transport layer, and anticipates that additional transport layers will be added. Moving the CCIX coherence protocol to the PCI Express standard simplifies CCIX implementation on processors and accelerators. Additionally, since existing hardware and software infrastructure can be utilized, it is easy to deploy CCIX technology on servers as well.
Consortium members can immediately utilize the CCIX specification, and products based on CCIX technology are scheduled to be introduced in 2017. The CCIX Consortium includes various industry leaders who are collaborating to develop a single interconnect technology specification. This specification enables processors using various instruction set architectures (ISAs) to consistently share data as accelerators and enables efficient heterogeneous computing, thereby significantly improving the efficiency of servers running data center tasks and embedded applications such as 5G wireless and mobile edge computing.
Addition of diverse new members ranging from silicon suppliers to ecosystem partners
The CCIX (Cache Coherent Interconnect for Accelerators) consortium announced that its membership has tripled due to the addition of new members and disclosed the CCIX specifications to its members.
Founding members AMD, ARM, Huawei, IBM, Mellanox Technologies, Qualcomm Technologies, and Xilinx announced that they welcome various ecosystem partners ranging from silicon suppliers to design, verification, software, and systems.
The new members are Amphenol Corp., Arteris Inc., Avery Design Systems, Atos, Cadence Design Systems, Inc., Cavium, Inc., IDT (Integrated Device Technology, Inc.), Keysight Technologies, Inc., Micron Technology, Inc., NetSpeed Systems, Red Hat Inc., Synopsys, Inc., Teledyne LeCroy, Texas Instruments, and TSMC.
CCIX is a processor based on multiple instruction set architectures that acceleratesIt enables extending cache coherency through iterators, interconnects, and I/O.
High-performance accelerators are core components of processor systems, and system designers can use CCIX technology to freely select appropriately combined heterogeneous components from various vendors to satisfy unique system requirements.
Through close collaboration, member companies adjusted the CCIX specification to address the need for data center connectivity. By leveraging and reinforcing the current general ecosystem, they enabled higher bandwidth, lower latency, and complete consistency.
Furthermore, the CCIX Consortium plans to increase the speed of the PCI Express architecture to over 25 Gbps to use it as the first transport layer, and anticipates that additional transport layers will be added. Moving the CCIX coherence protocol to the PCI Express standard simplifies CCIX implementation on processors and accelerators. Additionally, since existing hardware and software infrastructure can be utilized, it is easy to deploy CCIX technology on servers as well.
Consortium members can immediately utilize the CCIX specification, and products based on CCIX technology are scheduled to be introduced in 2017. The CCIX Consortium includes various industry leaders who are collaborating to develop a single interconnect technology specification. This specification enables processors using various instruction set architectures (ISAs) to consistently share data as accelerators and enables efficient heterogeneous computing, thereby significantly improving the efficiency of servers running data center tasks and embedded applications such as 5G wireless and mobile edge computing.
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