The Necessity of DFM in Manufacturing and the Difference from DRC

Cadnics is well-known for its Pollex in relation to DFN. What will be the content of the upcoming DFM seminar?

The last seminar was an introductory one; this time, I intend to share more in-depth content by focusing on DFN. In particular, what I want to emphasize when explaining DFN is the "power of standardization." To explain standardization, it can be described as the organization of standard specifications that can ultimately emerge from PCB design, circuit design, PCB production, and manufacturing processes.

- Is there no existing standardized specification?

That is not the case. While we must continue to research and develop high-quality technologies—reflecting recent trends such as higher frequencies, advanced packaging technology leading to reduced pin pitch, and miniaturized component sizes—we intend to emphasize the fundamental basic knowledge that underlies these advancements. This basic knowledge can ultimately be expressed as the design know-how possessed by the workers, and I believe it is necessary to suggest bringing that know-how out into the open. In this process, I will sequentially explain the benefits obtained by introducing practices such as DFM and the specialized verification program Pollex, hoping that you can gain at least some insight from this.

- What is DFM?

In a broad sense, DFM involves asking the following question regarding designs created using CAD: “Is our design truly suitable for production?” From a PCB perspective, standards regarding aspects such as the spacing between components must consider not only manufacturing aspects but also, furthermore, repair capabilities.

By "repair," do you mean modifications, etc.?

That's right. For certain chips, if the chip height is high, the spacing should be rougher than that of standard chips to facilitate modifications. Additionally, the spacing of components placed on the substrate must vary slightly depending on whether the board I am designing will use wave soldering or reflow soldering in mass production. Without such considerations, unnecessary space may be wasted, or manufacturing itself may become impossible.

I have often seen cases where actual mass production was initiated during SMT, but errors occurred because the parts did not fit properly, and the product eventually ended up being moved to storage.

Indeed, as a result, unnecessary costs are incurred, and manufacturing costs continue to rise due to the need for additional processes. Furthermore, time is just as critical as cost, and the practice of DFM is about reducing this time aspect. Cadnics has enabled the system to programmatically perform DFM based on standardized content. Ultimately, this does not mean creating entirely new things we did not know before; rather, it is about utilizing existing knowledge to expedite the process of correcting errors that occur when engineers lack sufficient time or budget.

Are you saying that the system is now demonstrating how things used to be done in the past, such as creating artwork from PCBs and getting confirmation from a supervisor?

That is correct. As mentioned earlier, know-how is not something possessed by new employees or those with short careers. Since know-how consists of skills already held by our predecessors, incorporating them into the system allows us to guarantee quality based on the fundamentals they possess. Furthermore, the reason for implementing DFM is that this serves as the basis for maintaining consistent PCB quality. The method of implementing DFM can be described as shifting from the traditional design review process, which involved visual inspections and multiple people spending hours diligently examining designs, to entrusting what can be handled by the system to the system and leaving what can be done by humans to humans.

You mentioned the spacing aspect regarding DFM... are there any examples of such solutions being applied to EMI, etc.?

It is necessary to distinguish between EMI and manufacturing. What I intend to discuss this time is manufacturing. This refers to DFM, specifically whether an environment conducive to efficient production has been established. For example, issues regarding the spacing between parts and silk screens occur frequently, yet most people do not seem to consider them very important. If the silk screen overlaps with the pad, someone must make corrections. Since manufacturing cannot proceed without these corrections, someone must perform the task; therefore, the question of who performs this task and what additional manpower and time are required is also included.
Furthermore, various CAD tools include a design rule checker called DRC, which is similar to DFM; however, DFM is an aspect that further specializes and expands upon DRC. CAD only provides information regarding clearance. However, there are many other factors that we must consider during the manufacturing process.

What is the current usage status of DFM in Korea?

We are currently in a phase where DFM is being introduced, driven by the issue of standardization. It is widely used by suppliers associated with companies like Samsung, LG, and Hyundai Motor, as well as by developers of automotive electronic products. Furthermore, starting from the end of last year, mid-sized enterprises are also actively considering DFM as awareness of such standardization has increased.

- If I were to summarize the explanation in a simpler way?

In other words, I would like to mention the difference between DRC and DFM. DRC involves verifying design rules provided by CAD tools within CAD software, and clearance is a key aspect. However, simply ensuring clearance does not guarantee a high-quality PCB. Therefore, from a manufacturing perspective, component placement is a crucial factor to consider. Various spacing combinations are possible, but this is impossible to achieve within CAD software. Furthermore, there are issues related to manufacturing standards and marks. When we speak of marks, we are not referring to the origin point in CAD, but rather specific marks that manufacturing equipment recognizes. The key is to determine whether these elements are properly aligned with the equipment and configured for optimal compatibility. Additionally, regarding the space utilization in CAD achieved by reducing the size of vias—that is, making them smaller increases available space—while this is beneficial, the problem is that reliability decreases as the size decreases. Beyond a certain threshold, the manufacturing process itself must be changed, resulting in exponentially rising unit costs. Therefore, I believe that if we identify the specifications for the most stable via hole size and apply them to the board, we can make it more stable. Since we are looking at it from that perspective, I believe you can fully recognize the difference from DRC. Furthermore, among the approximately 400 items we possess, not a single one was created by sitting in an office and worrying, "This kind of defect will occur." Instead, they were developed and verified through the application and verification of requests from actual program users who said, "This defect occurred, so please ensure this defect is not detected."