AtherisIP announced that its Ncore 2.0 cache coherent interconnect IP and optional Ncore Resilience package will revolutionize and accelerate next-generation autonomous driving systems and ADAS designs.

Ncore is an interconnect that allows SoC design teams to easily integrate custom processing elements using embedded low-latency proxy caches. In neural network machine learning SoCs where workloads are distributed across different processing elements, low-latency proxy caches provide a hardware- and software-efficient way to communicate.

Key features of Ncore 2.0 include ▲System error detection and correction, hardware data protection and intelligent unit ▲BIST (Built-In Self-Test), FMEDA (Failure Modes, Effects and Diagnostic Analysis), functional safety controller ▲Coherent memory cache with configurable settings, etc.

K of Atheris IP. “We developed the Ncore Resilience package based on feedback from our customers who are building machine learning systems,” said Charles Janak, CEO. “ArterisIP is designed specifically for designers of autonomous hardware SoCs, enabling them to address both design complexity and functional safety issues.”