'Ultra-high integration cell structure process' that completes a 64-layer cell into a single structure
Secured 1 Tera-bit V-NAND Core Technology

Samsung Electronics is expanding its 4th generation V-NAND lineup to the entire range of NAND products, including servers, PCs, and mobile devices, by beginning full-scale mass production of the '4th generation (64-layer) 256-gigabit (Gb) 3-bit V-NAND flash,' which delivers the world's highest performance and high reliability.

Samsung Electronics plans to expand the use of 4th generation V-NAND for mobile eUFS, consumer SSDs, and memory cards, following the 4th generation 256Gb V-NAND-based SSDs that began supplying to global B2B customers last January, and increase the monthly production share to over 50% within this year to meet the growing demand from global customers.

Three innovative technologies, including 'ultra-high integration cell structure and process', 'ultra-high speed operation circuit design', and 'ultra-high reliability CTF thin film formation', have been applied to the 4th generation (64-layer) V-NAND, improving speed, productivity, and power efficiency by more than 30% compared to the 3rd generation (48-layer) product.

V-NAND features a '3D (cylindrical) CTF cell structure' in which tens of layers are stacked to create data storage cells, and billions of tiny holes are uniformly drilled from top to bottom to vertically stack the cells.

However, stacking technology had physical limitations, such as the formed structure becoming distorted or differences in characteristics between the top and bottom cells appearing as the number of layers increased. In response, Samsung Electronics developed a "9-Hole" ultra-high-density cell structure and process technology to overcome limitations by forming a uniform hole pattern on each layer and distributing the load across the entire structure.

With this, Samsung Electronics has also secured the core technology to usher in the era of '1 Tera-bit V-NAND,' which stores more than 1 trillion pieces of information on a single semiconductor chip, by overcoming the vertical stacking limit of over 90 layers with the 4th generation V-NAND.

The 4th generation (64-layer) V-NAND not only has faster speeds but also lowered the operating voltage from 3.3V to 2.5V, increasing total power consumption efficiency by more than 30%.

In particular, by forming a Charge Trap Flash (CTF) thin film that can be controlled at the atomic level, the cell size was reduced while the write and erase characteristics lifespan was increased, and a control technology (channel thinning) that minimizes data interference between cells was also implemented, improving reliability by 20% compared to the 3rd generation.

Kyung-Hyeon Kye, Executive Vice President of the Flash Development Office at Samsung Electronics' Memory Business Division, stated, "All employees have dedicated themselves to developing innovative technologies to accelerate the era of Tera V-NAND," adding, "Going forward, we will continue to develop next-generation products in a timely manner to provide solutions that enhance user satisfaction for global IT companies and consumers."