High-Speed Data I/O, Low Power Consumption, Large Capacity Achievement

Toshiba Memory Corporation has developed 3D flash memory with TSV technology applied for the first time in the world

Toshiba Memory Corporation announced the development of BiCS FLASH 3D flash memory by applying TSV (Through Silicon Via) technology adopted with triple-level cell (TLC) technology that stores 3 bits per cell.

Product samples are scheduled to be disclosed in the second half of 2017. The prototype device will be unveiled at the 2017 Flash Memory Summit held August 7-10 in Santa Clara, California, USA.

The device with TSV technology applied features a structure that performs high-speed data I/O while reducing power consumption, with vertical electrodes and bias passing through the silicon die to provide connectivity. The actual performance in use has already been demonstrated through Toshiba's previously announced 2D NAND flash memory.

Toshiba Memory Corporation combined the 48-layer 3D flash process with TSV technology to successfully increase the product's programming bandwidth while lowering power consumption. The company explained that the power efficiency of a single package is approximately twice that of the same-generation BiCS FLASH™ memory using wire bonding technology. Additionally, the company stated that BiCS FLASH memory with TSV technology applied has a structure with 16 dies stacked in a single package, achieving a capacity of 1 terabyte (TB).

The company plans to commercialize BiCS FLASH memory with TSV technology applied and provide solutions suitable for storage applications requiring low latency and high bandwidth IOPS (input/output operations per second)/watt, including high-performance enterprise SSDs.