HONG KONG, March 23, 2012 — Altera (NASDAQ: ALTR) and TSMC (TWSE: 2330, NYSE: TSM) today announced that they have jointly developed the world’s first heterogeneous 3D IC test vehicle using TSMC’s Chip-on-Wafer-on-Substrate (CoWoS) integration process. Heterogeneous 3D IC is one of the innovative technologies that enables the advancement of “Moore’s Law” by stacking heterogeneous technologies such as analog, logic and memory onto a single device. TSMC’s integrated CoWoS process provides semiconductor companies developing 3D ICs with a comprehensive solution encompassing front-end manufacturing processes, back-end assembly and test solutions.
Altera has become the first semiconductor company to develop and characterize a heterogeneous test vehicle using TSMC’s CoWoS process. This test vehicle, along with additional test vehicles, enables Altera to rapidly test the functionality and reliability of 3D ICs to ensure that they meet yield and performance targets. Combining TSMC’s CoWoS process with Altera’s leading silicon and intellectual property (IP) expertise provides the technology foundation for rapid, low-cost development of heterogeneous 3D ICs.
Altera aims to develop a variety of device products that allow customers to mix and match silicon IPs according to their individual application needs in relation to heterogeneous 3D ICs. Based on its advanced technology accumulated in the FPGA field, Altera aims to integrate various technologies such as CPUs, ASICs, ASSPs, memories, and optical devices into FPGAs. Alera’s 3D ICs will enable customers to differentiate their applications by leveraging the flexibility of FPGAs while maximizing system performance, minimizing system power, and reducing form factor and system cost.
“Our partnerships with standards bodies such as IMEC and SEMATECH, and our use of TSMC’s advanced CoWoS manufacturing and assembly processes, position us well to deliver on our strategy to deliver heterogeneous 3D devices with critical features to our customers faster than anyone else,” said Bill Hata, senior vice president of worldwide operations and engineering at Altera. “By enabling heterogeneous 3D capabilities in our devices, we can continue to drive technology innovation and advance the pace of Moore’s Law.”
“Our relationship with Altera goes back nearly two decades, and during that time, we have worked closely together to develop cutting-edge manufacturing processes and semiconductor technologies,” said Rick Cassidy, president of TSMC North America. “Working with Altera to develop these next-generation 3D ICs is another example of how our two companies’ close collaboration is enabling the next level of semiconductor technology.”
CoWoS is an integrated process technology that uses the chip-on-wafer (CoW) bonding process to attach device silicon chips to wafers. By attaching this CoW chip to the substrate (CoW-On-Substrate), the final device component is completed. CoWoS technology prevents warpage caused during manufacturing by attaching device silicon to the original thickness wafer silicon and completing the manufacturing process. TSMC plans to provide CoWoS as a turnkey manufacturing service.