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NXP Unveils 'Agile I/O' with I2C

Google 우선 소스Published2012.10.22 21:31

October 22, 2012, Seoul – NXP Semiconductors NV (NASDAQ: NXPI) today announced a new family of 8-bit and 16-bit GPIO devices featuring Agile I/O. Agile I/O is an innovative option that integrates common functionalities required in embedded systems. The new GPIOs reduce the pin count of microprocessors or custom ASICs by extending two wires of the I2C bus into eight or sixteen general-purpose I/O pins, enabling interfaces with keyboards, switches, LEDs, displays, or even stepping motors. Additionally, Agile I/O GPIO expanders simplify firmware development by reducing Bill of Materials (BoM) through the removal of external components and minimizing required PCB space, while improving reliability by capturing real-time events and eliminating software latency.

The 16 devices announced today include eight devices with additional Agile I/O capabilities and eight industry-standard I2C GPIO expanders. The new GPIO expanders, which offer a wide voltage range including level-shifting and support down to 1.65V, provide significant cost savings as replacements for existing 2.3 to 5.5V GPIO devices. The new GPIOs provide the same pin-out and register set as industry-standard PCA95xx devices, and even include mid-cycle refresh, allowing them to be easily interchanged within the same socket.

Steve Blozis, Global Product Marketing Manager at NXP Semiconductors, stated, “Today, embedded systems, ranging from consumer devices to industrial equipment, are running on increasingly complex microprocessors and ASICs. However, adding input/output pins to interfaces with users and other ICs increases the overall package size and raises costs. A more elegant and cost-effective solution is to make the most of the two pins on the I2C bus, solve interface issues by adding as many Agile I/O expanders as needed, and reduce the number of external components required.” He added, “NXP’s latest generation GPIO devices support voltages as low as 1.65V and cover a comprehensive voltage range, addressing the industry trend of transitioning to low-voltage applications.”

Characteristics of 'Agile I/O'
The I2C Agile I/O Expander, which integrates highly useful features typically added in system applications, provides the following standard integrated hardware features.
• An interrupt pin that reports back to the control processor when the input state changes
• A hardware reset pin that returns the device to its default state without turning off the power to the component
• Two power supply pins for simple level-shifting between different voltage ranges

Additionally, Agile I/O includes important features that enable the following software programs.
• Input latch that maintains the input state
• Built-in pull-up and pull-down registers
• An interrupt mask that reduces interrupt traffic to the microcontroller and improves interrupt service response
• Interrupt register report identifying which input actually triggered the interrupt
• Output drive strength control that minimizes system noise when multiple outputs are switched simultaneously

Market launch
With a wide range of device options and packages available, system designers can select devices suitable for their designs at the optimal price point. The GPIO expanders announced today will be released in TSSOP as well as a 0.5mm pitch QFN package option, and the TSSOP type is available for immediate purchase.

The PCA(L)6408AHK is also available in a smaller 0.4mm pitch QFN, and the PCA(L)6416AEV is available in a 0.5mm pitch BGA. Agile I/O versions of both devices are scheduled to be released in 0.4mm pitch BGA packages targeting the growing thin portable market.

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