Texas Instruments (TI) ( NASDAQ : TXN) today introduced two devices supporting the JEDEC JESD204B serial interface standard for data converters. The ADS42JB69 is the industry’s first dual-channel, 16-bit analog-to-digital converter (ADC) to offer a JESD204B interface, supporting speeds up to 250 MSPS. The LMK04828 is the industry’s highest-performance clock jitter cleaner and the first to support JESD204B clocking. When used together, these devices deliver exceptional system-level performance for high-speed systems. For designs requiring a traditional parallel interface, TI also introduced the ADS42LB69, the industry’s first dual 16-bit, 250 MSPS ADC to offer an LVDS interface. (For more information and to order samples, visit http://www.ti.com/jesd204b-pr-kr )

JESD204B is an industry standard serial communications link that simplifies the digital data interface between data converters and devices such as FPGAs, DSPs, and ASICs. This standard reduces routing between devices, significantly reducing input/output and board space requirements in applications such as wireless communications, test and measurement, defense, and aerospace.

The ADS42JB69 is the only 16-bit ADC that integrates all three JESD204B subclasses, 0, 1, and 2, supporting multi-device synchronization between data converters, maximizing system design flexibility. It also supports the new JESD204B standard for deterministic latency, which provides fixed transmission delay characteristics regardless of the use of external timing signals. It is also compatible with the existing JESD204A standard.

Key Features and Benefits of ADS42JB69 and ADS42LB69
• Supports the best dynamic range performance to maximize receiver sensitivity: Both ADCs demonstrate 89 dBc spurious-free dynamic range (SFDR), which is up to 9 dB higher than competitive products at 170 MHz IF (intermediate frequency) input conditions, and 100 dBc SFDR performance excluding HD2 (harmonic distortion 2) and HD3, and provide 74.9 dBFS SNR (signal-to-noise ratio) and 100 dB of channel-to-channel isolation.
• Maximizes design flexibility with three digital interface options
o The ADS42JB69, which provides a JESD204B interface, reduces the number of required data interface lanes from 17 to 5, significantly reducing board space and design complexity.
o The ADS42LB69 supports traditional parallel interface designs with 17 double data rate (DDR) low-voltage differential signaling (LVDS) lanes or 10 LVDS lanes supporting quad data rates.
• Easy analog input interface: High-impedance analog input buffers with programmable full-scale range simplify input filter design and drive circuitry, while increasing performance uniformity and device-to-device reproducibility across the analog input frequency range.
• Lowest power consumption characteristics: ADS42JB69 consumes 775mW per channel, ADS42LB69 consumes 740mW per channel
• Pin-compatible family for design flexibility: The new ADCs are a family that includes pin-compatible high-performance 14-bit options, including the dual 14-bit 250MSPS ADS42JB49 (JESD204B) and ADS42LB49 (LVDS) provide SFDR performance of 89dBc and maximum SNR performance of 73.4dBFS at 170MHz IF conditions.

By combining the 16-bit ADS42JB69 and LMK04828, system designers can easily and reliably achieve JESD204B serial interface compatibility with unmatched performance while reducing bill of materials (BOM). The LMK04828 provides ultra-low jitter and phase noise performance while generating the JESD204B subclass 1 SYSREF (system timing reference signal) required for multi-device synchronization.

Key Features and Benefits of LMK04828
• Highest performance support: Provides less than 100fs RMS jitter (10KHz~20MHz) at 245.76MHz output clock using low-noise voltage-controlled crystal oscillator module
• Unique performance and feature integration: Provides options to maximize system performance and reduce component count and BOM while reducing clock architecture complexity
• JESD204B Subclass 1 SYSREF Generation: High-speed clocks are paired with JESD204B SYSREF companion signals to provide timing synchronization for up to seven subsystem JESD204B components.
• Enhanced flexibility:
o Dual voltage-controlled oscillator core operating at 2.5 GHz or 2.9 GHz provides seven sets of programmable clock outputs in LVDS, LVPECL (low-voltage positive-emitter-coupled logic), and HSDS (high-swing differential signaling) output formats for maximum flexibility
o Output pairs can be configured with a device clock and SYSREF or two device clocks to implement additional high-speed clocks to meet system requirements.
o Supports a variety of clocking requirements and architectures with programmable features such as digital delay, analog delay, and zero delay

Tools and Support
TI offers the following evaluation modules (EVMs) to help accelerate development with the new 16-bit and 14-bit 250-MSPS ADCs:
• 16-bit ADS42JB69SEK and 14-bit ADS42JB49SEK with JESD204B interface for $999
• 16-bit ADS42LB69EVM and 14-bit ADS42LB49EVM with LCDS interface for $399

These EVMs can be connected to the TSW1400EVM high-speed data acquisition and pattern generation platform for data analysis, as well as to FPGA development platforms from Altera and Xilinx. IBIS models for the ADS42LB69 and ADS42LB49 are also available to help verify board signal integrity requirements.

The LMK04828EVAL evaluation module is available now for $499. The clock design tool and CodeLoader software provide product selection, design, and simulation capabilities for timing solutions.

Technical support is also available through the High-Speed Data Converter and Clocks and Timers forums in the TI E2ETM Community, where you can ask questions directly to TI experts.

Availability, Packages and Prices
Samples of the 16-bit ADS42JB69 (JESD204B) and ADS42LB69 (LVDS), and the 14-bit ADS42JB49 (JESD204B) and ADS42LB49 (LVDS) are available now in a 9 mm x 9 mm QFN package. The ADS42JB69 and ADS42LB69 are priced at $185 each, and the ADS42JB49 and ADS42LB49 are priced at $125 each, and production is scheduled for Q2 2013.

Samples of the LMK04828 are available now in a 9 mm x 9 mm QFN package, priced at $11.20 in 1,000-unit quantities. Production quantities are scheduled for Q1 2013. Samples of the LMK04826 for systems requiring a VCO operating at 1.9 GHz or 2.5 GHz are expected to be available in early Q1 2013, with unit pricing starting at $11.20 in 1,000-unit quantities, with production quantities starting in late Q1 2013.

TI's Milcom 2013 Exhibit Information
TI will be present at Milcom 2013 to showcase a variety of products and demos. Visit TI's booth (#1536) to see the ADS42JB69 and LMK04828 in action along with several demonstrations showcasing TI's high-speed data converters, amplifiers, RF, clocks, interface and high-reliability products for applications ranging from aerospace and defense to wireless and satellite communications.

Learn more about TI's data converter and clock portfolio
• Request samples and order EVM: www.ti.com/jesd204b-pr-kr
• Download the ADS42JB69 and ADS42JB49 data sheets: www.ti.com/ads42jb69-pr
• Download the LMK04828 and LMK04826 datasheets: www.ti.com/lmk04828-pr
• Download the ADS42LB69 and ADS42LB49 datasheets: www.ti.com/ads42lb69-pr
• Video on how to use ADC and clocks in your system: www.ti.com/jesd204bv-pr