Hong Kong, December 13, 2012 — Altera (NASDAQ: ALTR) and ARM (LON: ARM, NASDAQ: ARMH) announced that, in an unprecedented partnership, the two companies have jointly developed the DS-5 Embedded Software Development Toolkit, which provides FPGA adaptive debug capabilities for use with Altera SoC devices. This ARM® Development Studio 5 (DS-5™) Altera Edition toolkit is designed to remove debugging barriers between the dual-core CPU subsystem and the FPGA fabric within Altera SoC devices. By combining a superior multicore debugger for ARM architectures with capabilities that adapt to logic designed on the FPGA, this new toolkit enables embedded software developers to achieve previously impossible levels of total chip visibility and control through the standard DS-5 user interface. This new toolkit will be included in Altera's SoC Embedded Design Suite and is scheduled to be available starting early 2013.

Altera SoC devices combine a dual-core ARM Cortex™-A9 processor with FPGA logic in a single device, providing the performance and flexibility to implement customized field-programmable SoC designs by allowing users to design custom peripherals and hardware accelerators with the FPGA fabric. Altera has begun supplying samples of the Cyclone® V SoC devices first.

The ARM Development Studio 5 (DS-5) Altera Edition toolkit seamlessly extends embedded debugging capabilities across the CPU-FPGA boundary by dynamically adapting to the unique customer configuration of the FPGA within the SoC, and unifies all software debugging information from the CPU and FPGA domains through the standard DS-5 user interface. By combining this toolkit with the excellent multicore debugging capabilities of the DS-5 Debugger and integrating it with the SignalTap logic analyzer of Quartus® II software to enable cross-triggering, unprecedented debugging visibility and control can be achieved, thereby significantly improving work productivity.

John Cornish, Executive Vice President of System Design at ARM, stated, “Innovative silicon devices containing heterogeneous elements require innovative software tools that contain equally heterogeneous functions. This innovative toolkit, designed for use with Altera’s 28nm Cyclone V and Arria V SoC devices as well as the upcoming Altera 20nm SoC devices, meets just such demands. As a technological innovation, this toolkit significantly enhances user productivity by unifying CPU debugging and FPGA debugging. Altera and ARM were able to develop this advanced tool technology by leveraging the high-performance productivity enhancements widely available in the Altera SoC Development Kit and Altera SoC Embedded Design Suite. This has greatly increased utility for the mutual customers of both companies.”

The ARM DS-5 Toolkit Suite provides the industry's most advanced multicore debugger for use with ARM architecture. This toolkit enables debugging for systems operating in asymmetric and symmetric multiprocessing configurations. It is widely used for board bring-up, driver development, OS porting, bare-metal, and Linux application development via JTAG and Ethernet debugging interfaces, and provides Linux and RTOS awareness.

Vince Hu, Vice President of Product and Marketing at Altera, said, “We are very pleased to have collaborated with ARM to jointly develop this innovative toolkit.” “The ARM DS-5 Altera Edition toolkit provides software engineers with incredibly powerful development and debugging tools, enabling very rapid development work using our company’s SoC devices,” he said.

Key Features and Benefits:
• The software debug view adapts to include peripheral elements programmed by the developer into the FPGA fabric, providing a smooth view that shows the hard and soft peripheral register memory map of the entire SoC.
• DS-5 Debugger simultaneously displays debug/trace data of CoreSight™ compatible custom logic cores implemented with Cortex-A9 processor cores and FPGA fabrics.
• The Altera USB Blaster JTAG Debug Cable supports the DS-5 debugger and all other Altera JTAG-based tools for use with Altera SoC devices.
• Signal events within the FPGA fabric can be captured and visualized non-intrusively and time-correlated with software events and processor instruction traces.
• Enhanced signal-level hardware cross-triggering between CPU and FPGA logic domains is possible, enabling simultaneous cross-domain hardware/software debugging.
• Since it includes the DS-5 Streamline performance analyzer, software thread and event information can be correlated with hardware counters of the SoC and FPGA, allowing system-level bottlenecks to be identified and corrected.

Price and supply
The ARM DS-5 Altera Edition toolkit for Altera SoCs was unveiled at the ARM Technical Symposium held in Paris on December 13, 2012.It is scheduled to be. This toolkit is included in the Altera SoC Embedded Design Suite (Altera SoC EDS) Subscription Edition, priced at $995. More information about Altera SoC EDS can be found at www.altera.com/soc-eds . More information about the ARM DS-5 Altera Edition toolkit can be found at www.altera.com/ds-5-ae . Altera SoC EDS is scheduled to be available starting in early 2013.