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Xilinx, Artix UltraScale+ FPGA and
Zynq UltraScale+ ZU1 Device Unveiled
Produced using TSMC's 16nm InFO packaging process
Xilinx announced on the 18th that it is expanding its low-cost UltraScale+™ portfolio to support ultra-compact, high-performance edge computing.

Artix® and Zynq® UltraScale+ devices, which are 70% smaller than existing chip-scale packages, are hardware-adaptive products based on 16nm technology and are provided with TSMC’s InFO (Integrated Fan Out) packaging technology for mounting chips onto wafers.
The Artix UltraScale+ FPGA family is suitable for machine vision, 4K UHD video converters, and secure networking applications. It consists of the AU10P, AU15P, AU20P, and AU25P, and all four devices provide 16Gbps transceivers and high DSP performance.
The Zynq UltraScale+ MPSoC ZU1 device supports edge connectivity with embedded vision cameras, AVoIP (AV-over-IP) based 8K streaming, portable test equipment, industrial/medical/consumer IoT systems. It runs on a heterogeneous Arm® multicore processor subsystem and can be migrated to a general-purpose footprint-based package.
Its high level of security also makes it suitable for use in the defense industry. The Artix FPGA product family and the Zynq MPSoC ZU1 device have obtained RSA-4096 certification and include AES-CGM decoding and DPA protection measures, as well as Xilinx’s proprietary Security Monitor IP, which can address security threats throughout the product lifecycle.
The Artix FPGA family is scheduled for production in the third quarter of 2021, and support for the Vivado® Design Suite and Vitis™ Unified Software Platform tools will begin in late summer of this year.
Samples of the Zynq MPSoC ZU1 device will be available in the third quarter of 2021, tool support will begin in the second quarter, and mass production is scheduled to start in the fourth quarter.
Zynq UltraScale+ ZU1 Device Unveiled
Produced using TSMC's 16nm InFO packaging process
Xilinx announced on the 18th that it is expanding its low-cost UltraScale+™ portfolio to support ultra-compact, high-performance edge computing.
▲ Artix UltraScale+ FPGA product family [Photo = Xilinx]
Artix® and Zynq® UltraScale+ devices, which are 70% smaller than existing chip-scale packages, are hardware-adaptive products based on 16nm technology and are provided with TSMC’s InFO (Integrated Fan Out) packaging technology for mounting chips onto wafers.
The Artix UltraScale+ FPGA family is suitable for machine vision, 4K UHD video converters, and secure networking applications. It consists of the AU10P, AU15P, AU20P, and AU25P, and all four devices provide 16Gbps transceivers and high DSP performance.
The Zynq UltraScale+ MPSoC ZU1 device supports edge connectivity with embedded vision cameras, AVoIP (AV-over-IP) based 8K streaming, portable test equipment, industrial/medical/consumer IoT systems. It runs on a heterogeneous Arm® multicore processor subsystem and can be migrated to a general-purpose footprint-based package.
Its high level of security also makes it suitable for use in the defense industry. The Artix FPGA product family and the Zynq MPSoC ZU1 device have obtained RSA-4096 certification and include AES-CGM decoding and DPA protection measures, as well as Xilinx’s proprietary Security Monitor IP, which can address security threats throughout the product lifecycle.
The Artix FPGA family is scheduled for production in the third quarter of 2021, and support for the Vivado® Design Suite and Vitis™ Unified Software Platform tools will begin in late summer of this year.
Samples of the Zynq MPSoC ZU1 device will be available in the third quarter of 2021, tool support will begin in the second quarter, and mass production is scheduled to start in the fourth quarter.
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