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Latest IAR Embedded Workbench for RISC-V,
Including AndeStar V5 RISC-V Performance Extensions
Supporting Latest Andes RISC-V Processor Technology
IAR Systems® announced on the 20th a new version of specialized development tools for RISC-V. In the latest release, IAR Embedded Workbench® for RISC-V, a complete development toolchain for RISC-V, adds support for the latest Andes RISC-V feature extensions and tools to guarantee maximum performance in RISC-V-based applications.
IAR Embedded Workbench for RISC-V helps developers verify that applications meet required specifications and optimize onboard memory utilization. With support for AndeStar™ V5 RISC-V performance extensions, developers can use IAR Embedded Workbench to develop applications with increased performance and reduced code size.
The toolchain supports all Andes 32-bit V5 RISC-V cores including N22, N25F, D25F, A25, A27, N45, D45, and A45. The RISC-V Packed SIMD/DSP extension specification (RVP draft) and corresponding intrinsics as well as the Andes DSP Library are supported.
Dr. Charlie Su, President and CTO of Andes Technology, stated, "The AndeStar V5 RISC-V architecture supports standard instructions and provides full compatibility with small, modular, and extensible RISC-V technology. We integrate Andes extension features proven in over 7 billion AndeStar V3 processors, such as performance and CoDense™ extensions, into applications from edge to cloud."
IAR Embedded Workbench exclusively for RISC-V is a complete C/C++ compiler and debugger toolchain with everything embedded developers need integrated into a single IDE. C-STAT® for static code analysis is included to ensure code quality.
It demonstrates code compliance with industry standards such as MISRA C:2012, MISRA C++:2008, and MISRA C:2004, and detects defects, bugs, and security vulnerabilities as defined in CERT C and the Common Weakness Enumeration (CWE).
For companies using safety-critical applications, IAR Embedded Workbench for RISC-V is available as a functional safety version certified by TÜV SÜD in accordance with IEC 61508, ISO 26262, IEC 62304, EN 50128, EN 50657, IEC 60730, ISO 13849, IEC 62061, IEC 61511, and ISO 25119, supporting streamlined verification procedures.
Including AndeStar V5 RISC-V Performance Extensions
Supporting Latest Andes RISC-V Processor Technology
IAR Systems® announced on the 20th a new version of specialized development tools for RISC-V. In the latest release, IAR Embedded Workbench® for RISC-V, a complete development toolchain for RISC-V, adds support for the latest Andes RISC-V feature extensions and tools to guarantee maximum performance in RISC-V-based applications.
▲ IAR Embedded Workbench for RISC-V [Image=IAR]
IAR Embedded Workbench for RISC-V helps developers verify that applications meet required specifications and optimize onboard memory utilization. With support for AndeStar™ V5 RISC-V performance extensions, developers can use IAR Embedded Workbench to develop applications with increased performance and reduced code size.
The toolchain supports all Andes 32-bit V5 RISC-V cores including N22, N25F, D25F, A25, A27, N45, D45, and A45. The RISC-V Packed SIMD/DSP extension specification (RVP draft) and corresponding intrinsics as well as the Andes DSP Library are supported.
Dr. Charlie Su, President and CTO of Andes Technology, stated, "The AndeStar V5 RISC-V architecture supports standard instructions and provides full compatibility with small, modular, and extensible RISC-V technology. We integrate Andes extension features proven in over 7 billion AndeStar V3 processors, such as performance and CoDense™ extensions, into applications from edge to cloud."
IAR Embedded Workbench exclusively for RISC-V is a complete C/C++ compiler and debugger toolchain with everything embedded developers need integrated into a single IDE. C-STAT® for static code analysis is included to ensure code quality.
It demonstrates code compliance with industry standards such as MISRA C:2012, MISRA C++:2008, and MISRA C:2004, and detects defects, bugs, and security vulnerabilities as defined in CERT C and the Common Weakness Enumeration (CWE).
For companies using safety-critical applications, IAR Embedded Workbench for RISC-V is available as a functional safety version certified by TÜV SÜD in accordance with IEC 61508, ISO 26262, IEC 62304, EN 50128, EN 50657, IEC 60730, ISO 13849, IEC 62061, IEC 61511, and ISO 25119, supporting streamlined verification procedures.
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