July 3, 2013 – Imagination Technologies (hereinafter Imagination, www.imgtec.com), a leading company in multimedia, communications semiconductors, and cloud technology, announced that it disclosed details of its new MIPS CPU portfolio on June 25 in London, UK.

Imagination updated its existing portfolio of MIPS Aptive cores and introduced expanded cores for each Aptive line. Additionally, Imagination plans to unveil a new generation of MIPS CPUs including 32-bit and 64-bit versions in the second half of this year. The new MIPS Series5 generation CPU core, codenamed 'Warrior', is based on a new architecture and delivers world-class performance and efficiency for diverse applications.

New MIPS Aptive
Imagination further expanded the MIPS Aptive generation cores by adding a single-core version with a small footprint to the interAptive product line and adding a floating-point arithmetic version to the microAptive product line. The high-performance proAptive, multithreaded interAptive, and compact microAptive deliver industry-leading low-power performance and efficiency suitable for cutting-edge designs.
• The proAptive line will be released in configurations ranging from single-core to six-core versions with optional hardware floating-point capability.
• The interAptive line includes hardware multithreading and is currently available in single-core, dual-core, and quad-core configurations with optional floating-point arithmetic capability. The new single-core version of interAptive eliminates extra logic related to multicore coherence and L2 cache controllers, providing an efficient, multithreaded single-core processor.
• The microAptive line is available in versions targeting microcontrollers and deeply embedded processors. This enables the implementation of optional hardware floating-point arithmetic units in application fields such as electrical metering and motor control.

MIPS Roadmap
Imagination plans to introduce the next-generation MIPS 'Warrior' core in the second half of this year and is already sharing details of the core with its key MIPS customers.

The 'Warrior' core will include 32-bit and 64-bit products focused on superior performance and efficiency across high-end, mid-range, and low-end microcontroller CPUs. This core is based on MIPS, the industry's most efficient RISC architecture, and aims to achieve the highest performance and lowest power consumption for a given silicon area.

Based on MIPS 32-bit and 64-bit instruction compatibility, the 'Warrior' core provides binary compatibility from low-end to high-end. The 64-bit 'Warrior' core requires no excess baggage for executing 32-bit code, and can directly leverage the diverse range of tools and applications built for 64-bit MIPS architecture over the past 20 years.

Key features of the 'Warrior' core are as follows:
• Hardware virtualization that delivers strong performance across diverse applications, from business environments focused on computing performance to mobile platforms where energy efficiency is critical
• MIPS hardware multithreading technology that enables improved overall throughput, quality of service (QoS), and power/performance efficiency on selected 'Warrior' cores
• Imagination's proprietary highly scalable security framework for applications including content protection on mobile devices, secure networking protocols, and payment services
• MIPS SIMD Architecture (MSA) designed to easily support high-level languages such as C or OpenCL, enabling both rapid and simple development of new code as well as leveraging existing code
• Consistent and comprehensive toolchain across the 'Warrior' series for rapid and simple development and debugging

MIPS, a New Alternative in the CPU Market
Hossein Yassaie, CEO of Imagination Technologies, stated, "The CPU industry wants customer choice in the market, and we plan to position MIPS as a reliable alternative," and added, "Imagination has a diverse and high-performance core portfolio, and will complete our lineup with the high-efficiency, high-performance 'Warrior' core that goes beyond products currently in the market."

Furthermore, he said, "We are sharing Imagination's leading MIPS core roadmap with customers worldwide and receiving very positive feedback. We are also envisioning solutions that allow customers to benefit from a wide range of applications with MIPS, from small embedded devices to 64-bit multicore products over a long term. We have also disclosed the technology behind the MIPS roadmap, and we are confident that we will transform the landscape of CPU IP."

Meanwhile, J. Scott Gardner, microprocessor analyst at The Linley Group, stated, "The MIPS Aptive CPU core portfolio is a broad portfolio spanning virtually all processor categories, and was selected as '2012 Best Processor IP' at The Linley Group's annual Analysts' Choice Awards." He added, "The MIPS 'Warrior' generation is designed to include a wider range of functionality to respond to rapidly changing markets. If Imagination demonstrates strength in the new MIPS generation as it does with PowerVR GPUs, the industry will see another strong leader in the CPU IP domain."

Having acquired MIPS earlier this year, Imagination consolidated its CPU engineering teams and invested approximately double the resources in MIPS CPU development. In addition, Imagination is actively investing in MIPS development including tools, compilers, debuggers, operating systems, and software. Imagination continues to grow the MIPS ecosystem and, in line with trends toward open operating systems and architecture neutrality and portability, is highlighting MIPS presence in key areas such as mobile.

About MIPS Processors
Imagination's MIPS processors are ideal for products requiring ultra-low power, compact silicon area, and high integration. MIPS processor IP cores and architecture range from ultra-low power 32-bit microcontrollers to scalable 32-bit and 64-bit multi-solutions for advanced applications and network processing platforms.

Over more than 30 years, Imagination's MIPS architecture has built innovative technology and expertise, making it the industry's most efficient RISC architecture that achieves the best performance and lowest power consumption for a given silicon area. SoC designers can leverage these advantages to reduce costs and power. Additionally, additional cores can be run to gain performance benefits compared to the same power, thermal, and area budgets.